74LVC4245A-Q100
Octal dual supply translating transceiver; 3-state
Rev. 1 — 20 October 2014
Product data sheet
1. General description
The 74LVC4245A-Q100 is an octal dual supply translating transceiver featuring
non-inverting 3-state bus compatible outputs in both send and receive directions. It is
designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply
environment.
The device features an output enable input (pin OE) for easy cascading and a
send/receive input (pin DIR) for direction control. Pin OE controls the outputs so that the
buses are effectively isolated.
In suspend mode, when V
CC(A)
is zero, there is no current flow from one supply to the
other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be
smaller than V
diode
(typical 0.7 V).
V
CC(A)
V
CC(B)
, except in suspend mode.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
5 V tolerant inputs/outputs, for interfacing with 5 V logic
Wide supply voltage range:
3 V bus (V
CC(B)
): 1.5 V to 3.6 V
5 V bus (V
CC(A)
): 1.5 V to 5.5 V
CMOS low-power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
High-impedance when V
CC(A)
= 0 V
Complies with JEDEC standard no. JESD8B/JESD36
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options
NXP Semiconductors
74LVC4245A-Q100
Octal dual supply translating transceiver; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVC4245AD-Q100
40 C
to +125
C
SO24
TSSOP24
Description
plastic small outline package; 24 leads;
body width 7.5 mm
Version
SOT137-1
Type number
74LVC4245APW-Q100
40 C
to +125
C
74LVC4245ABQ-Q100
40 C
to +125
C
plastic thin shrink small outline package; 24 leads; SOT355-1
body width 4.4 mm
SOT815-1
DHVQFN24 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
24 terminals; body 3.5
5.5
0.85 mm
4. Functional diagram
2
DIR
OE
22
3
A0
B0
21
4
22
2
G3
3EN1
3EN2
5
A1
B1
A2
B2
19
20
1
3
4
5
6
7
8
9
10
mna452
6
2
21
20
19
8
18
17
16
15
14
10
9
7
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
14
15
16
17
18
mna453
Fig 1.
IEC Logic symbol
Fig 2.
Logic diagram
74LVC4245A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 20 October 2014
2 of 17
NXP Semiconductors
74LVC4245A-Q100
Octal dual supply translating transceiver; 3-state
5. Pinning information
5.1 Pinning
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 3.
Pin configuration SO24 and TSSOP24
Fig 4.
Pin configuration DHVQFN24
5.2 Pin description
Table 2.
Symbol
V
CC(A)
V
CC(B)
GND
DIR
A[0:7]
B[0:7]
OE
Pin description
Pin
1
23, 24
11, 12, 13
2
3, 4, 5, 6, 7, 8, 9, 10
21, 20, 19, 18, 17, 16, 15, 14
22
Description
supply voltage (5 V bus)
supply voltage (3 V bus)
ground (0 V)
direction control
data input or output
data input or output
output enable input (active LOW)
74LVC4245A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 20 October 2014
3 of 17
NXP Semiconductors
74LVC4245A-Q100
Octal dual supply translating transceiver; 3-state
6. Functional description
Table 3.
Input
OE
L
L
H
[1]
Functional table
[1]
Input/output
DIR
L
H
X
An
A=B
input
Z
Bn
input
B=A
Z
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC(A)
V
CC(B)
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage A
supply voltage B
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+6.5
+4.6
-
+6.5
50
V
CC
+ 0.5
+6.5
50
100
-
+150
500
Unit
V
V
mA
V
mA
V
V
mA
mA
mA
C
mW
V
I
< 0 V
[1]
50
0.5
-
0.5
0.5
-
-
100
65
[3]
[1]
[1]
[3]
V
O
> V
CCO
or V
O
< 0 V
output HIGH or LOW state
output 3-state
V
O
= 0 V to V
CCO
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO24 packages: above 70
C
the value of P
tot
derates linearly with 8 mW/K.
For TSSOP24 packages: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN24 packages: above 60
C
the value of P
tot
derates linearly with 4.5 mW/K.
[3]
V
CCO
is the supply voltage associated with the output.
8. Recommended operating conditions
Table 5.
Symbol
V
CC(A)
Recommended operating conditions
Parameter
supply voltage A
Conditions
V
CC(A)
V
CC(B)
;
see
Figure 5
for maximum
speed performance
V
CC(A)
V
CC(B)
;
see
Figure 5
for low-voltage
applications
for control inputs
All information provided in this document is subject to legal disclaimers.
Min
1.5
Typ
-
Max
5.5
Unit
V
V
CC(B)
supply voltage B
1.5
-
3.6
V
V
I
74LVC4245A_Q100
input voltage
0
-
5.5
V
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 20 October 2014
4 of 17
NXP Semiconductors
74LVC4245A-Q100
Octal dual supply translating transceiver; 3-state
Table 5.
Symbol
V
O
T
amb
t/V
Recommended operating conditions
…continued
Parameter
output voltage
ambient temperature
input transition rise and fall rate
V
CC(B)
= 2.7 V to 3.0 V
V
CC(B)
= 3.0 V to 3.6 V
V
CC(A)
= 3.0 V to 4.5 V
V
CC(A)
= 4.5 V to 5.5 V
Conditions
output HIGH or LOW state
output 3-state
Min
0
0
40
-
-
-
-
Typ
-
-
-
-
-
-
-
Max
V
CC
5.5
+125
20
10
20
10
Unit
V
V
C
ns/V
ns/V
ns/V
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH-level input voltage
LOW-level input voltage
Conditions
V
CC(B)
= 2.7 V to 3.6 V
V
CC(A)
= 4.5 V to 5.5 V
V
CC(B)
= 2.7 V to 3.6 V
V
CC(A)
= 4.5 V to 5.5 V
HIGH-level output voltage V
I
= V
IH
or V
IL
V
CC(B)
= 2.7 V to 3.6 V; I
O
=
100 A
V
CC(B)
= 2.7 V; I
O
=
12
mA
V
CC(B)
= 3.0 V; I
O
=
24
mA
V
CC(A)
= 4.5 V to 5.5 V; I
O
=
100 A
V
CC(A)
= 4.5 V; I
O
=
12
mA
V
CC(A)
= 4.5 V; I
O
=
24
mA
V
OL
LOW-level output voltage V
I
= V
IH
or V
IL
V
CC(B)
= 2.7 V to 3.6 V; I
O
= 100
A
V
CC(B)
= 2.7 V; I
O
= 12 mA
V
CC(B)
= 3.0 V; I
O
= 24 mA
V
CC(A)
= 4.5 V to 5.5 V; I
O
= 100
A
V
CC(A)
= 4.5 V; I
O
= 12 mA
V
CC(A)
= 4.5 V; I
O
= 24 mA
I
I
I
OZ
input leakage current
OFF-state output current
V
I
= 5.5 V or GND
V
I
= V
IH
or V
IL
V
CC(B)
= 3.6 V; V
O
= V
CC(B)
or GND
V
CC(A)
= 5.5 V; V
O
= V
CC(A)
or GND
I
CC
supply current
I
O
= 0 A
V
CC(B)
= 3.6 V;
other inputs at V
CC(B)
or GND
V
CC(A)
= 5.5 V;
other inputs at V
CC(A)
or GND
-
-
0.1
0.1
10
10
A
A
[2]
Min
2.0
2.0
-
-
V
CC(B
)
0.2
V
CC(B
)
0.5
V
CC(B
)
0.8
V
CC(A
)
0.2
V
CC(A
)
0.5
V
CC(A
)
0.8
-
-
-
-
-
-
-
-
-
Typ
[1]
-
-
-
-
V
CC(B
)
-
-
V
CC(A
)
-
-
-
-
-
-
-
-
0.1
0.1
0.1
Max
-
-
0.8
0.8
-
-
-
-
-
-
0.20
0.40
0.55
0.20
0.40
0.55
5
5
5
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
A
T
amb
=
40 C
to +85
C
74LVC4245A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 20 October 2014
5 of 17
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