REVISIONS
LTR
F
DESCRIPTION
Figure 1; changed case outline M to be available in either a single or
dual cavity package. Added vendor CAGE code 0EU86 for device
types 05 through 10. -sld
Added device types 11 through 16.
Add note to paragraph 1.2.2 and table I, conditions. Add thermal
resistance, junction-to-case (q
JC
) for all case outlines. Add case
outline 9.
Table I, I
CC
change maximum limits and I
SB
change maximum limits.
Figure 1, case outline M, correct diagram adding "c" dimension, lead
thickness and change dimension A2 maximum from 0.020" to 0.025".
Figure 1, case outline 9, minimum dimension for D2/E2, change 0.990
inches to 0.980 inches and 25.15 mm to 24.89 mm.
Table I; Operating supply current (I
CC
) changed the maximum limit for
device types 9 and 15 at f = 50 MHz from 700 mA to 725 mA and for
device types 10 and 16 at f = 58.8 MHz from 700 mA to 750 mA. -sld
Added device types 17 through 20. -sld
Added case outline A. -sld
Added case outline B. Added note to paragraph 1.2.4. -sld
Table I; Changed the I
OL
from 8 mA to 6 mA for device types 07-10
and 13 -20 for the V
OL
test. Editorial changes throughout. -sld
Updated drawing paragraphs. -sld
DATE (YR-MO-DA)
99-04-22
APPROVED
K. A. Cottongim
G
H
99-08-18
00-04-06
Raymond Monnin
Raymond Monnin
J
00-06-19
Raymond Monnin
K
L
01-5-16
01-12-21
Raymond Monnin
Raymond Monnin
M
N
P
R
T
02-11-18
03-02-24
03-12-19
04-05-03
12-09-12
Raymond Monnin
Raymond Monnin
Raymond Monnin
Raymond Monnin
Charles F. Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
T
15
T
16
T
17
T
18
REV
SHEET
PREPARED BY
Gary Zahn
CHECKED BY
Michael C. Jones
T
19
T
20
T
21
T
1
T
22
T
2
T
23
T
3
T
24
T
4
T
25
T
5
T
26
T
6
T
27
T
7
T
28
T
8
T
29
T
9
T
30
T
10
T
31
T
11
T
12
T
13
T
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil/
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, HYBRID, MEMORY,
DIGITAL, 512K x 32-BIT, STATIC RANDOM
ACCESS MEMORY, CMOS
DRAWING APPROVAL DATE
95-11-13
REVISION LEVEL
T
SIZE
A
SHEET
CAGE CODE
67268
1 OF
31
5962-94611
5962-E471-12
DSCC FORM 2233
APR 97
1. SCOPE
1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A
choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When
available, a choice of radiation hardness assurance levels are reflected in the PIN.
1.2 PIN. The PIN shall be as shown in the following example:
5962
½
½
½
Federal
stock class
designator
\
-
½
½
½
RHA
designator
(see 1.2.1)
\/
Drawing number
1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA
levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type 1/ 2/
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
Generic number
S512K32-120
S512K32-100
S512K32-85
S512K32-70
S512K32-55
S512K32-45
S512K32-35
S512K32-25
S512K32-20
S512K32-17
S512K32-55
S512K32-45
S512K32-35
S512K32-25
S512K32-20
S512K32-17
S512K32-15
S512K32-12
S512K32-15
S512K32-12
Circuit function
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
512K X 32-BIT SRAM
Access time
120 ns
100 ns
85 ns
70 ns
55 ns
45 ns
35 ns
25 ns
20 ns
17 ns
55 ns
45 ns
35 ns
25 ns
20 ns
17 ns
15 ns
12 ns
15 ns
12 ns
94611
01
½
½
½
Device
type
(see 1.2.2)
/
H
½
½
½
Device
class
designator
(see 1.2.3)
A
½
½
½
Case
outline
(see 1.2.4)
X
½
½
½
Lead
finish
(see 1.2.5)
1/ Due to the nature of the 4 transistor design of the die used in these device types, topologically pure testing is
important, particularly for high reliability applications. The device manufacturer should be consulted concerning
their testing methods and algorithms
2/ Device types 11 through 18 are not tested to data retention supply voltage (V
DR
) and data retention current (I
CCDR1
).
See table I.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
REVISION LEVEL
T
5962-94611
SHEET
2
DSCC FORM 2234
APR 97
1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level.
All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K,
and E) or QML Listing (Class G and D). The product assurance levels are as follows:
Device class
K
Device performance documentation
Highest reliability class available. This level is intended for use in space
applications.
Standard military quality class level. This level is intended for use in applications
where non-space high reliability devices are required.
Reduced testing version of the standard military quality class. This level uses the
Class H screening and In-Process Inspections with a possible limited temperature
range, manufacturer specified incoming flow, and the manufacturer guarantees (but
may not test) periodic and conformance inspections (Group A, B, C, and D).
Designates devices which are based upon one of the other classes (K, H, or G)
with exception(s) taken to the requirements of that class. These exception(s) must
be specified in the device acquisition document; therefore the acquisition document
should be reviewed to ensure that the exception(s) taken will not adversely affect
system performance.
Manufacturer specified quality class. Quality level is defined by the manufacturers
internal, QML certified flow. This product may have a limited temperature range.
H
G
E
D
1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter
A
B
M 3/
T
U
X
Y
9 3/
Descriptive designator
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
Terminals
68
68
68
66
66
66
68
68
Package style
Co-fired ceramic, quad flatpack, single cavity
Ceramic, quad flatpack, single cavity
Co-fired ceramic, single/dual cavity, quad flatpack
Hex-in-line, single cavity, with standoffs
Hex-in-line, single cavity, with standoffs
Hex-in-line, single cavity, with standoffs
Ceramic, quad flatpack, single cavity
Ceramic, quad flatpack, single cavity
1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534.
3/
Due to the short leads of case outlines M (single cavity) and case outline 9, caution should be taken if the system
application is to be used where extreme thermal transitions can occur. Case outline A can be used if longer leads are
necessary.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
REVISION LEVEL
T
5962-94611
SHEET
3
DSCC FORM 2234
APR 97
1.3 Absolute maximum ratings. 4/
Supply voltage range (V
CC
) ........................................................
Signal voltage range (V
g
) ...........................................................
Power dissipation (P
D
):
Device types 01-04 and 17-20 ...................................................
Device types 05, 06, 11, and 12 ................................................
Device types 07, 08, 13, and 14 ................................................
Device types 09, 10, 15, and 16 ................................................
Thermal resistance, junction-to-case (q
JC
):
Case outline A and M .............................................................
Case outlines T, U, and X.......................................................
Case outline Y ........................................................................
Case outlines B and 9 ............................................................
Storage temperature range ........................................................
Lead temperature (soldering, 10 seconds) ................................
Junction temperature (T
J
) ..........................................................
1.4 Recommended operating conditions.
Supply voltage range (V
CC
) ........................................................
Input low voltage range (V
IL
) ......................................................
Input high voltage range (V
IH
) ....................................................
Output low voltage, maximum (V
OL
) ...........................................
Output high voltage, minimum (V
OH
) ..........................................
Ambient operating temperature range (T
A
) ................................
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
+4.5 V dc to +5.5 V dc
-0.3 V dc to +0.8 V dc
+2.2 V dc to V
CC
+0.3 V dc
+0.4 V dc
+2.4 V dc
-55°C to +125°C
-0.5 V dc to +7.0 V dc
-0.5 V dc to V
CC
+0.5 V dc
2.2 W
3.2 W
3.6 W
4.4 W
9.27°C/W
4.160°C/W
5.251°C/W
1.495°C/W
-65°C to +150°C
+300°C
+150°C
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38534 - Hybrid Microcircuits, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at
https://assist.dla.mil/quicksearch/
or from the Standardization Document
Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
4/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
REVISION LEVEL
T
5962-94611
SHEET
4
DSCC FORM 2234
APR 97
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in
accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as
designated in the device manufacturer's Quality Management (QM) plan or as designated for the applicable device class. The
manufacturer may eliminate, modify, or optimize the tests and inspections herein, however, the performance requirements as
defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not
affect the form, fit, or function of the device for the applicable device class.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38534 and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.
3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4 and 5.
3.2.5 Block diagram. The block diagram shall be as specified on figure 6.
3.2.6 Output load circuit. The output load circuit shall be as specified on figure 7.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full specified operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with
the PIN listed in 1.2 herein. In addition, the manufacturer's vendor similar PIN may also be marked.
3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described
herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample,
for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those
which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be
made available to the preparing activity (DLA Land and Maritime -VA) upon request.
3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this
drawing. The certificate of compliance (original copy) submitted to DLA Land and Maritime -VA shall affirm that the
manufacturer's product meets the performance requirements of MIL-PRF-38534 and herein.
3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of
microcircuits delivered to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
REVISION LEVEL
T
5962-94611
SHEET
5
DSCC FORM 2234
APR 97
TI技术论坛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
