Cal Crystal Lab, Inc. / Comclok, Inc. 800-333-9825
1156 North Gilbert Street • Anaheim, CA 92801
TRI-STATE ENABLE/DISABLE OSCILLATORS / HCMOS / TTL
(FULL & HALF SIZE)
MODEL CT
5.0VDC
Model
Frequency Range
Frequency Stability
Operating Temperature Range
Storage Temperature Range
Current Consumption
Supply Voltage
Symmetry
Rise & Fall Time (Tr & Tf)
Logic “1”
Logic “0”
Output Load (Max)
Aging
Enable Input
10kHz ~ 69.999MHz
100ppm Standard, Optional Tolerances Available
0
o
C ~+70
o
C Extended Temperature Ranges Available
-55
o
C ~+125
o
C
10.0KHz ~ 23.999MHz:
15mA Max
24.000MHz ~ 69.999MHz: 30mA Max
+5 VDC
±
10%
60/40 @ 50% Vcc, Optional Tolerances Available
6 nSec Max
4.5 VDC Min
0.5 VDC Max
10TTL / 20pF
< 5ppm per year
Enable - Logic “1” 2.0 VDC Min
Disable - Logic “0” 0.5 VDC Max
CT
70MHz ~ 160.0MHz
CT
100ppm Standard, Optional Tolerances Available
0
o
C ~+70
o
C Extended Temperature Ranges Available
-55
o
C ~+125
o
C
70.0MHz ~ 99.9MHz:
30mA Max
100.00MHz ~ 129.9MHz: 35mA Max
130.00MHz ~ 160.00MHz: 40mA Max
+5 VDC
±
10%
60/40 @ 50% Vcc, Optional Tolerances Available
3 nSec Max
4.5 VDC Min
0.5 VDC Max
2TTL / 15pF
< 5ppm per year
Enable - Logic “1” 2.0 VDC Min
Disable - Logic “0” 0.5 VDC Max
FULL SIZE TRI-STATE
PINS
CONNECTIONS
1
ENABLE / DISABLE
7
GND
8
OUTPUT
14
+5 VDC
±10%
TEST CIRCUIT FULL SIZE
HALF SIZE TRI-STATE
PINS
CONNECTIONS
1
ENABLE / DISABLE
4
GND
5
OUTPUT
8
+5 VDC
±10%
TEST CIRCUIT HALF SIZE
NOTE:
1.
C
L
Capacitance includes probe and test jig 20pF typical (10kHz ~ 69.999MHz)
C
L
Capacitance includes probe and test jig 15pF typical (70MHz ~ 160.000MHz)
2. R
L
= 400Ω - 10TTL
2kΩ - 10LSTTL
3. All diodes are 1N941, 1N43064 or equivalent
28
FPGA/CPLD
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