CMLDM8002A
CMLDM8002AG*
CMLDM8002AJ
SURFACE MOUNT SILICON
DUAL P-CHANNEL
ENHANCEMENT-MODE
MOSFETS
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DESCRIPTION:
These CENTRAL SEMICONDUCTOR devices are
dual chip enhancement-mode P-Channel MOSFETs,
manufactured by the P-Channel DMOS Process,
designed for high speed pulsed amplifier and driver
applications. The CMLDM8002A utilizes the USA
pinout configuration, while the CMLDM8002AJ, utilizing
the Japanese pinout configuration, is available as a
special order. These special Dual Transistor devices
offer Low rDS(on) and Low VDS(on).
MARKING CODES: CMLDM8002A:
C08
CMLDM8002AG*: CG8
CMLDM8002AJ: CJ8
FEATURES:
•
•
•
•
Dual Chip Device
Low rDS(on)
Low VDS(on)
Low Threshold Voltage
• Fast Switching
• Logic Level Compatible
• Small SOT-563 package
SOT-563 CASE
*
Device is
Halogen Free
by design
APPLICATIONS:
• Load/Power Switches
• Power Supply Converter Circuits
• Battery Powered Portable Equipment
MAXIMUM RATINGS:
(TA=25°C)
Drain-Source Voltage
Drain-Gate Voltage
Gate-Source Voltage
Continuous Drain Current
Continuous Source Current (Body Diode)
Maximum Pulsed Drain Current
Maximum Pulsed Source Current
Power Dissipation (Note 1)
Power Dissipation (Note 2)
Power Dissipation (Note 3)
Operating and Storage Junction Temperature
Thermal Resistance
SYMBOL
VDS
VDG
VGS
ID
IS
IDM
ISM
PD
PD
PD
TJ, Tstg
Θ
JA
50
50
20
280
280
1.5
1.5
350
300
150
-65 to +150
357
UNITS
V
V
V
mA
mA
A
A
mW
mW
mW
°C
°C/W
ELECTRICAL CHARACTERISTICS PER TRANSISTOR:
(TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
MAX
IGSSF, IGSSR
VGS=20V, VDS=0
100
IDSS
IDSS
ID(ON)
BVDSS
VGS(th)
VDS=50V, VGS=0
VDS=50V, VGS=0, TJ=125°C
VGS=10V, VDS=10V
VGS=0, ID=10μA
VDS=VGS, ID=250μA
1.0
500
500
50
1.0
2.5
UNITS
nA
μA
μA
mA
V
V
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm
2
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm
2
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm
2
R4 (28-October 2013)
CMLDM8002A
CMLDM8002AG*
CMLDM8002AJ
SURFACE MOUNT SILICON
DUAL P-CHANNEL
ENHANCEMENT-MODE
MOSFETS
ELECTRICAL
SYMBOL
VDS(ON)
VDS(ON)
VSD
rDS(ON)
rDS(ON)
rDS(ON)
rDS(ON)
gFS
Crss
Ciss
Coss
ton / toff
CHARACTERISTICS PER TRANSISTOR - Continued:
(TA=25°C unless otherwise noted)
TEST CONDITIONS
MIN
MAX
UNITS
VGS=10V, ID=500mA
1.5
V
VGS=5.0V, ID=50mA
0.15
V
VGS=0, IS=115mA
1.3
V
VGS=10V, ID=500mA
2.5
Ω
VGS=10V, ID=500mA, TJ=125°C
4.0
Ω
VGS=5.0V, ID=50mA
3.0
Ω
VGS=5.0V, ID=50mA, TJ=125°C
5.0
Ω
VDS =10V, ID=200mA
200
mS
VDS=25V, VGS=0, f=1.0MHz
7.0
pF
VDS=25V, VGS=0, f=1.0MHz
70
pF
VDS=25V, VGS=0, f=1.0MHz
15
pF
VDD=30V, VGS=10V, ID=200mA
RG=25Ω, RL=150Ω
20
ns
SOT-563 CASE - MECHANICAL OUTLINE
CMLDM8002A
(USA Pinout)
CMLDM8002AG*
LEAD CODE:
1) Gate Q1
2) Source Q1
3) Drain Q2
4) Gate Q2
5) Source Q2
6) Drain Q1
MARKING CODES:
CMLDM8002A: C08
CMLDM8002AG*: CG8
*
Device is
Halogen Free
by design
CMLDM8002AJ
(Japanese Pinout)
LEAD CODE:
1) Source Q1
2) Gate Q1
3) Drain Q2
4) Source Q2
5) Gate Q2
6) Drain Q1
MARKING CODE: CJ8
R4 (28-October 2013)
w w w. c e n t r a l s e m i . c o m
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