Features
•
•
•
•
•
•
•
•
•
•
•
•
80C51 Core Architecture
256 Bytes of On-chip RAM
256 Bytes of On-chip XRAM
16K Bytes of On-chip Flash Memory
– Data Retention: 10 Years at 85°C
– Erase/Write Cycle: 100K
2K Bytes of On-chip Flash for Bootloader
2K Bytes of On-chip EEPROM
– Erase/Write Cycle: 100K
14-sources 4-level Interrupts
Three 16-bit Timers/Counters
Full Duplex UART Compatible 80C51
Maximum Crystal Frequency 40 MHz. In X2 Mode, 20 MHz (CPU Core, 40 MHz)
Three or Four Ports: 16 or 20 Digital I/O Lines
Two-channel 16-bit PCA
– PWM (8-bit)
– High-speed Output
– Timer and Edge Capture
Double Data Pointer
21-bit Watchdog Timer (7 Programmable bits)
A 10-bit Resolution Analog-to-Digital Converter (ADC) with 8 Multiplexed Inputs
Power-saving Modes
– Idle Mode
– Power-down Mode
Power Supply: 3 Volts to 5.5 Volts
Temperature Range: Industrial (-40° to +85°C)
Packages: SOIC28, SOIC24, PLCC28, VQFP32
•
•
•
•
•
•
•
Low Pin Count
8-bit
Microcontroller
with A/D
Converter and
16 KBytes Flash
Memory
T89C5115
AT89C5115
Rev. 4128F–8051–05/06
Description
The T89C5115 is a high performance Flash version of the 80C51 single chip 8-bit micro-
controllers. It contains a 16-KB Flash memory block for program and data.
The 16-KB Flash memory can be programmed either in parallel mode or in serial mode
with the ISP capability or with software. The programming voltage is internally gener-
ated from the standard VCC pin.
The T89C5115 retains all features of the 80C52 with 256 bytes of internal RAM, a 7-
source 4-level interrupt controller and three timer/counters. In addition, the T89C5115
has a 10-bit A/D converter, a 2-KB Boot Flash memory, 2-KB EEPROM for data, a Pro-
grammable Counter Array, an XRAM of 256 bytes, a Hardware WatchDog Timer and a
more versatile serial channel that facilitates multiprocessor communication (EUART).
The fully static design of the T89C5115 reduces system power consumption by bringing
the clock frequency down to any value, even DC, without loss of data.
The T89C5115 has two software-selectable modes of reduced activity and an 8 bit clock
prescaler for further reduction in power consumption. In the idle mode the CPU is frozen
while the peripherals and the interrupt system are still operating. In the power-down
mode the RAM is saved and all other functions are inoperative.
The added features of the T89C5115 make it more powerful for applications that need
A/D conversion, pulse width modulation, high speed I/O and counting capabilities such
as industrial control, consumer goods, alarms, motor control, etc. While remaining fully
compatible with the 80C52 it offers a superset of this standard microcontroller.
In X2 mode a maximum external clock rate of 20 MHz reaches a 300 ns cycle time.
Block Diagram
T2EX
RxD
TxD
Vcc
Vss
PCA
ECI
T2
10-bit
ADC
VAVCC
VAGND
VAREF
UART
RAM
256x8
Flash Boot
EE
16K x loader PROM
8
2K x 8 2K x 8
XRAM
256 x 8
PCA
Timer 2
XTAL1
XTAL2
CPU
C51
CORE
IB-bus
Timer 0
Timer 1
INT
Ctrl
Parallel I/O Ports
Port 1 Port 2 Port 3 Port 4
Watch
Dog
RESET
T0
T1
INT0
INT1
P1(1)
P2(2)
P3
Note:
1. 8 analog Inputs/8 Digital I/O.
2. 2-bit I/O Port.
2
AT89C5115
4128F–8051–05/06
P4(2)
AT89C5115
Pin Configurations
VAREF
VAGND
VAVCC
P4.1
P4.0
P2.1
P3.7
P3.6
P3.5/T1
P3.4/T0
P3.3/INT1
P3.2/INT0
P3.1/TxD
P3.0/RxD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 P1.0/AN0/T2
27 P1.1/AN1/T2EX
26 P1.2/AN2/ECI
25 P1.3/AN3/CEX0
24 P1.4/AN4/CEX1
23 P1.5/AN5
22 P1.6/AN6
21 P1.7/AN7
20 P2.0
19
18
17
16
15
RESET
VSS
VCC
XTAL1
XTAL2
SO28
VAREF
VAGND
VAVCC
P4.1
P4.0
P3.5/T1
P3.4/T0
P3.3/INT1
P3.2/INT0
P3.1/TxD
P3.0/RxD
XTAL2
1
2
3
4
5
6
7
8
9
10
11
12
SO24
24 P1.0/AN0/T2
23 P1.1/AN1/T2EX
22 P1.2/AN2/ECI
21 P1.3/AN3/CEX0
20 P1.4/AN4/CEX1
19 P1.5/AN5
18 P1.6/AN6
17 P1.7/AN7
16 RESET
15
14
13
VSS
VCC
XTAL1
4
3
2
1
28
27
26
VAVCC
VAGND
VAREF
P1.0/AN 0/T2
P1.1/AN1/T2EX
P1.2/AN2/ECI
P4.1
P4.0
P2.1
P3.7
P3.6
P3.5/T1
P3.4/T0
P3.3/INT1
5
6
7
8
9
10
11
PLCC-28
25
24
23
22
21
20
19
P1.3/AN3/CEX0
P1.4/AN4/CEX1
P1.5/AN5
P1.6/AN6
P1.7/AN7
P2.0
RESET
P3.2/INT0
P3.1/TxD
P3.0/RxD
XTAL2
XTAL1
VCC
VSS
12
13
14
15
16
17
18
3
4128F–8051–05/06
32
31
30
29
28
27
26
25
P4.1
VAVCC
NC
VAGND
VAREF
P1.0/AN 0/T2
P1.1/AN1/T2EX
P1.2/AN2/ECI
4
AT89C5115
4128F–8051–05/06
P3.2/INT0
P3.1/TxD
P3.0/RxD
NC
XTAL2
XTAL1
VCC
VSS
9
10
11
12
13
14
15
16
P4.0
P2.1
P3.7
P3.6
P3.5/T1
P3.4/T0
NC
P3.3/INT1
1
2
3
4
5
6
7
8
QFP-32
24
23
22
21
20
19
17
18
P1.3/AN3/CEX0
P1.4/AN4/CEX1
P1.5/AN5
P1.6/AN6
P1.7/AN7
P2.0
NC
RESET
AT89C5115
Pin Description
Pin Name
Type
Description
VSS
VCC
VAREF
VAVCC
VAGND
P1.0:7
GND
Circuit ground
Supply Voltage
Reference Voltage for ADC
Supply Voltage for ADC
Reference Ground for ADC
I/O
Port 1:
Is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins can be used for digital input/output or as
analog inputs for the Analog Digital Converter (ADC). Port 1 pins that have 1’s written to them are pulled
high by the internal pull-up transistors and can be used as inputs in this state. As inputs, Port 1 pins that
are being pulled low externally will be the source of current (I
IL
, See section ’Electrical Characteristic’)
because of the internal pull-ups. Port 1 pins are assigned to be used as analog inputs via the ADCCF
register (in this case the internal pull-ups are disconnected).
As a secondary digital function, port 1 contains the Timer 2 external trigger and clock input; the PCA
external clock input and the PCA module I/O.
P1.0/AN0/T2
Analog input channel 0,
External clock input for Timer/counter2.
P1.1/AN1/T2EX
Analog input channel 1,
Trigger input for Timer/counter2.
P1.2/AN2/ECI
Analog input channel 2,
PCA external clock input.
P1.3/AN3/CEX0
Analog input channel 3,
PCA module 0 Entry of input/PWM output.
P1.4/AN4/CEX1
Analog input channel 4,
PCA module 1 Entry of input/PWM output.
P1.5/AN5
Analog input channel 5,
P1.6/AN6
Analog input channel 6,
P1.7/AN7
Analog input channel 7,
It can drive CMOS inputs without external pull-ups.
Port 2:
Is an 2-bit bi-directional I/O port with internal pull-ups. Port 2 pins that have 1’s written to them are pulled
high by the internal pull-ups and can be used as inputs in this state. As inputs, Port 2 pins that are being
pulled low externally will be a source of current (IIL, on the datasheet) because of the internal pull-ups.
In the T89C5115 Port 2 can sink or source 5mA. It can drive CMOS inputs without external pull-ups.
P2.0:1
I/O
5
4128F–8051–05/06
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
