Memory ICs
Serial interface IC for DIMMs sup-
porting plug & play
BU9877FV
The BU9877FV is a 2-k bit EEPROM with a write protect function, developed for DIMMs (Dual In-line Memory
Modules) containing a synchronous DRAM. This IC stores IDs in memory in order to enable Plug & Play functions.
•
Applications144-pin DRAM modules containing syn-
168-pin and
chronous DRAM
•
Features
1) 2-k bit EEPROM with configuration of 256 words
×
8
bits.
2) Compliance with SPD data format.
3) Dual-line serial (I
2
C bus) interface.
4) Protective functions enabled by a one-time ROM
and write protect pin.
Soft ware protection. as a one-time ROM: 00 to 7Fh.
Hard ware protection (WP pin): 80 to FFh.
5) Compact SSOP-B 8-pin package.
•
Absolute maximum ratings (Ta = 25°C)
Parameter
Applied voltage
Power dissipation
Storage temperature
Operating temperature
Input voltage
Symbol
V
CC
Pd
Tstg
Topr
—
Limits
– 0.3 ~ + 7.0
300
∗
– 65 ~ + 125
– 40 ~ + 85
– 0.3 ~ V
CC
+ 0.3
Unit
V
mW
°C
°C
V
∗
1 Reduced by 3.0mW for each increase in Ta of 1°C over 25°C.
•
Recommended operating conditions (Ta = 25°C)
Parameter
Power supply voltage
Input voltage
Symbol
V
CC
V
IN
Limits
2.7 ~ 5.5
0 ~ V
CC
Unit
V
V
1
Memory ICs
BU9877FV
•
Block diagram
A0
1
2048bit EEPROM Array
8
Vcc
8bit
8bit
A1
2
Address
Decoder
8bit
Slave · word
Address Register
Data
Register
7
WP
START
A2
3
Control Circuit
STOP
6
SCL
Write Protect Control Circuit
GND
4
High voltage generator
Power supply voltage detector
ACK
5
SDA
•
Pin descriptions
Pin No.
1, 2, 3
4
5
6
7
8
Pin name
A0, A1, A2
GND
SDA
SCL
WP
V
CC
I/O
I
—
I/O
I
I
—
Slave address setting (pin)
Input / output reference voltage of 0V
Slave and word address, serial data input / output
Serial clock input
Write protect input
Connect the power supply to this.
Function
Note: The SDA pin is Nch open drain output, and should be used with external pull-up resistor.
The WP pin is equipped with internal pull-down resistor, so can be left open when used.
•
Electrical characteristics (unless otherwise noted, Ta = – 40 to + 85°C, Vcc = 2.7V to 5.5V)
Parameter
Input high level voltage
Input low level voltage
Output low level voltage
Input leakage current 1
Input leakage current 2
Output leakage current
Operating current
consumption
Standby current
SCL frequency
Symbol
V
IH
V
IL
V
OL
I
LI1
I
LI2
I
LO
I
CC
I
SB
f
SCL
Min.
0.7V
CC
—
—
–1
–1
–1
—
—
—
Typ.
—
—
—
—
—
—
—
—
—
Max.
—
0.3V
CC
0.4
1
20
1
3.0
2.0
100
Unit
V
V
V
µA
µA
µA
mA
µA
kHz
Conditions
—
—
I
OL
= 3.0mA (SDA)
V
IN
= 0V ~ V
CC
V
IN
= 0V ~ V
CC
(WP)
V
OUT
= 0V ~ V
CC
V
CC
= 5.5V, f
SCL
= 100kHz
V
CC
= 5.5V, SDA · SCL = V
CC
—
Measurement circuit
—
—
Fig.1
Fig.2
Fig.2
Fig.2
Fig.3
Fig.4
—
2
Memory ICs
BU9877FV
•
Operation timing characteristics (unless otherwise noted, Ta = – 40 to + 85°C , Vcc = 2.7V to 5.5V)
Parameter
Data clock HIGH time
Data clock LOW time
SDA / SCL rise time
SDA / SCL fall time
Start condition hold time
Start condition setup time
Input data hold time
Input data setup time
Output data delay time
Output data hold time
Stop condition setup time
Bus release time prior to start of transfer
∗
1
Symbol
t HIGH
t LOW
tR
tF
t HD: STA
t SU: STA
t HD: DAT
t SU: DAT
t PD
t DH
t SU:STO
t BUF
t WR1
t WR2
tI
Min.
4.0
4.7
—
—
4.0
4.7
0
250
—
0.3
4.7
4.7
—
—
—
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
—
—
1.0
0.3
—
—
—
—
3.5
—
—
—
10
15
0.1
Unit
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
ms
ms
µs
Internal write cycle time
∗
2
Effective noise elimination interval (SCL, SDA pins)
∗
1 V
CC
= 4.5V to 5.5V
∗
2 V
CC
= 2.7V to 5.5V
(3) Start condition (start bit recognition)
Before executing the various commands, a start condi-
tion (start bit) must be input. This is recognized when
SCL is HIGH and SDA falls from HIGH to LOW.
If a start condition is not input, no commands will be
received.
(4) Stop condition (stop bit recognition)
To terminate the various commands, a stop condition
(stop bit) must be input. This is recognized when SCL
is HIGH and SDA rises from LOW to HIGH.
(5) Precautions concerning the write command
With the write command, internal writing is initiated by
inputting the stop bit after the data has been input.
(6) Device addressing (specifying the slave address)
The master address should be output first, followed by
the start condition, and then the slave address. The
first four bits of the slave address are used to recog-
nize the device type. The device code for this IC is
fixed at "1010". When accessing the write protect regis-
ter, a device code of "0110" is used.
The next three bits of the slave address (A2, A1, A0)
are used to select the device, and the IC begins to
function only if the data input for A2 to A0 matches the
states of input pins A2 to A0. Consequently, up to eight
of these ICs may be connected on the same bus,
depending on the combination of A2 to A0.
The last bit of the slave address (R / W) is used to
specify either writing or reading, and is as shown
below.
R / W set to 0: Writing or Random Read
R / W set to 1: Reading
Device type
1010
0110
Device address
A2
A2
A1
A1
A0
A0
R/W
W
Access to memory
Access to write protect register
5
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