MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MMFT960T1/D
Medium Power Field Effect
Transistor
N–Channel Enhancement–Mode
Silicon Gate TMOS
SOT–223 for Surface Mount
This TMOS medium power field effect transistor is designed for
high speed, low loss power switching applications such as
switching regulators, dc–dc converters, solenoid and relay drivers.
The device is housed in the SOT–223 package which is designed
for medium power surface mount applications.
•
Silicon Gate for Fast Switching Speeds
•
RDS(on) = 1.7 Ohm Max
•
Low Drive Requirement
•
The SOT–223 Package can be soldered using wave or reflow.
The formed leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
•
Available in 12 mm Tape and Reel
Use MMFT960T1 to order the 7 inch/1000 unit reel
Use MMFT960T3 to order the 13 inch/4000 unit reel
1
GATE
3 SOURCE
2,4 DRAIN
MMFT960T1
Motorola Preferred Device
MEDIUM POWER
TMOS FET
300 mA
60 VOLTS
RDS(on) = 1.7 OHM MAX
®
4
1
2
3
CASE 318E–04, STYLE 3
TO–261AA
MAXIMUM RATINGS
(TC = 25°C unless otherwise noted)
Rating
Drain–to–Source Voltage
Gate–to–Source Voltage — Non–Repetitive
Drain Current
Total Power Dissipation @ TA = 25°C(1)
Derate above 25°C
Operating and Storage Temperature Range
Symbol
VDS
VGS
ID
PD
TJ, Tstg
Value
60
±
30
300
0.8
6.4
– 65 to 150
Unit
Volts
Volts
mAdc
Watts
mW/°C
°C
DEVICE MARKING
FT960
THERMAL CHARACTERISTICS
Thermal Resistance — Junction–to–Ambient
Maximum Temperature for Soldering Purposes
Time in Solder Bath
R
θJA
TL
156
260
10
°C/W
°C
Sec
1. Device mounted on a FR–4 glass epoxy printed circuit board using minimum recommended footprint.
TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company
Preferred
devices are Motorola recommended choices for future use and best overall value.
REV 3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
©
Motorola, Inc. 1997
1
MMFT960T1
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0, ID = 10
µA)
Zero Gate Voltage Drain Current
(VDS = 60 V, VGS = 0)
Gate–Body Leakage Current
(VGS = 15 Vdc, VDS = 0)
V(BR)DSS
IDSS
IGSS
60
—
—
—
—
—
—
10
50
Vdc
µAdc
nAdc
ON CHARACTERISTICS(1)
Gate Threshold Voltage
(VDS = VGS, ID = 1.0 mAdc)
Static Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 1.0 A)
Drain–to–Source On–Voltage
(VGS = 10 V, ID = 0.5 A)
(VGS = 10 V, ID = 1.0 A)
Forward Transconductance
(VDS = 25 V, ID = 0.5 A)
VGS(th)
RDS(on)
VDS(on)
—
—
gfs
—
—
—
600
0.8
1.7
—
mmhos
1.0
—
—
—
3.5
1.7
Vdc
Ohms
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
1. Pulse Test: Pulse Width
≤
300
µs,
Duty Cycle
≤
2.0%.
(VGS = 10 V, ID = 1 0 A
V
1.0 A,
VDS = 48 V)
(VDS = 25 V, VGS = 0,
V
0
f = 1.0 MHz)
Ciss
Coss
Crss
Qg
Qgs
Qgd
—
—
—
—
—
—
65
33
7.0
3.2
1.2
2.0
—
—
—
—
—
—
nC
pF
TYPICAL ELECTRICAL CHARACTERISTICS
5
TJ = 25°C
I D, DRAIN CURRENT (AMPS)
VGS = 10 V
3
8V
7V
2
6V
5V
4V
0
0
4
6
8
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
2
10
0
0
4
6
8
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
2
10
I D, DRAIN CURRENT (AMPS)
4
0.8
1
TJ = 25°C
TJ = – 55°C
TJ = 125°C
0.6
0.4
VDS = 10 V
0.2
1
Figure 1. On–Region Characteristics
Figure 2. Transfer Characteristics
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMFT960T1
TYPICAL ELECTRICAL CHARACTERISTICS
RDS(on) , DRAIN–SOURCE RESISTANCE (NORMALIZED)
RDS(on) , DRAIN–SOURCE RESISTANCE (OHMS)
5
VGS = 10 V
4
10
ID = 1 A
VGS = 10 V
3
TJ = 125°C
2
25°C
1
– 55°C
0
0
0.5
1
1.5
2
ID, DRAIN CURRENT (AMPS)
2.5
1
0.1
– 75
– 50
– 25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
125
150
Figure 3. On–Resistance versus Drain Current
Figure 4. On–Resistance Variation with Temperature
250
225
I D, DRAIN CURRENT (AMPS)
200
C, CAPACITANCE (pF)
1
175
150
125
100
75
50
25
0
0.3
0.6
0.9
1.2
1.5
VSD, SOURCE–DRAIN DIODE FORWARD VOLTAGE (VOLTS)
0
0
5
Crss
10
15
20
25
VDS, DRAIN–SOURCE VOLTAGE (VOLTS)
30
Coss
Ciss
VGS = 0 V
f = 1 MHz
TJ = 25°C
TJ = 125°C
0.1
TJ = 25°C
Figure 5. Source–Drain Diode Forward Voltage
Figure 6. Capacitance Variation
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
10
ID = 1 A
TJ = 25°C
gFS , TRANSCONDUCTANCE (mhos)
9
8
7
6
5
4
3
2
1
0
0
0.5
1
1.5
2
2.5
3
Qg, TOTAL GATE CHARGE (nC)
3.5
4
VDS = 30 V
VDS = 48 V
2
VDS = 10 V
1.5
1
TJ = – 55°C
0.5
125°C
0
25°C
0
0.5
1
1.5
ID, DRAIN CURRENT (AMPS)
2
2.5
Figure 7. Gate Charge versus Gate–to–Source Voltage
Figure 8. Transconductance
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
MMFT960T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.15
3.8
0.079
2.0
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.091
2.3
0.248
6.3
0.059
1.5
inches
mm
SOT-223
SOT-223 POWER DISSIPATION
The power dissipation of the SOT-223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, R
θJA
, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SOT-223 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
R
θJA
dissipation can almost be doubled with this method, area is
taken up on the printed circuit board which can defeat the
purpose of using surface mount technology. A graph of R
θJA
versus collector pad area is shown in Figure 9.
160
R JA , Thermal Resistance, Junction
to Ambient ( C/W)
Board Material = 0.0625″
G-10/FR-4, 2 oz Copper
0.8 Watts
TA = 25°C
140
°
120
1.25 Watts*
1.5 Watts
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 0.8 watts.
PD = 150°C – 25°C = 0.8 watts
156°C/W
The 156°C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 0.8 watts. There are
other alternatives to achieving higher power dissipation from
the SOT-223 package. One is to increase the area of the
collector pad. By increasing the area of the collector pad, the
power dissipation can be increased. Although the power
100
*Mounted on the DPAK footprint
0.2
0.4
0.6
A, Area (square inches)
0.8
1.0
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad™. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
θ
80
0.0
Figure 9. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMFT960T1
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
The stencil opening size for the SOT-223 package should be
the same as the pad size on the printed circuit board, i.e., a
1:1 registration.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•
Always preheat the device.
•
The delta temperature between the preheat and
soldering should be 100°C or less.*
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
•
The soldering temperature and time should not exceed
260°C for more than 10 seconds.
•
When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
•
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•
Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones, and a
figure for belt speed. Taken together, these control settings
make up a heating “profile” for that particular circuit board.
On machines controlled by a computer, the computer
remembers these profiles from one operating session to the
next. Figure 10 shows a typical heating profile for use when
soldering a surface mount device to a printed circuit board.
This profile will vary among soldering systems but it is a good
starting point. Factors that can affect the profile include the
type of soldering system in use, density and types of
components on the board, type of solder used, and the type
of board or substrate material being used. This profile shows
temperature versus time. The line on the graph shows the
STEP 1
PREHEAT
ZONE 1
“RAMP”
200°C
STEP 2
STEP 3
VENT
HEATING
“SOAK” ZONES 2 & 5
“RAMP”
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
150°C
150°C
100°C
100°C
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
50°C
140°C
actual temperature that might be experienced on the surface
of a test board at or near a central solder joint. The two
profiles are based on a high density and a low density board.
The Vitronics SMD310 convection/infrared reflow soldering
system was used to generate this profile. The type of solder
used was 62/36/2 Tin Lead Silver with a melting point
between 177 –189°C. When this type of furnace is used for
solder reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
STEP 6 STEP 7
STEP 5
STEP 4
VENT COOLING
HEATING
HEATING
ZONES 4 & 7
ZONES 3 & 6
205° TO
“SPIKE”
“SOAK”
219°C
170°C
PEAK AT
SOLDER
160°C
JOINT
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 10. Typical Solder Heating Profile
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
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