Philips Semiconductors
Product specification
PowerMOS transistor
BUK483-60A
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope suitable for surface
mount applications.
The device is intended for use in
automotive and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
V
GS
= 10 V
MAX.
60
3.2
1.8
150
0.10
UNIT
V
A
W
˚C
Ω
PINNING - SOT223
PIN
1
2
3
4
gate
drain
source
drain (tab)
DESCRIPTION
PIN CONFIGURATION
4
SYMBOL
d
g
1
2
3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
DM
P
tot
T
stg
T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
amb
= 25 ˚C
T
amb
= 100 ˚C
T
amb
= 25 ˚C
T
amb
= 25 ˚C
-
-
MIN.
-
-
-
-
-
-
-
- 55
-
MAX.
60
60
30
3.2
2.0
13
1.8
150
150
UNIT
V
V
V
A
A
A
W
˚C
˚C
THERMAL RESISTANCES
SYMBOL
R
th j-sp
R
th j-amb
PARAMETER
From junction to solder point
1
From junction to ambient
CONDITIONS
Mounted on any PCB
Mounted on PCB of fig.18
MIN.
-
-
TYP.
12
-
MAX.
15
70
UNIT
K/W
K/W
1
Temperature measured at solder joint on drain tab.
September 1995
1
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistor
BUK483-60A
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise specified
SYMBOL
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)
PARAMETER
Drain-source breakdown
voltage
Gate threshold voltage
Zero gate voltage drain current
Zero gate voltage drain current
Gate source leakage current
Drain-source on-state
resistance
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA
V
DS
= V
GS
; I
D
= 1 mA
V
DS
= 60 V; V
GS
= 0 V;
V
DS
= 60 V; V
GS
= 0 V; T
j
= 125 ˚C
V
GS
=
±30
V; V
DS
= 0 V
V
GS
= 10 V; I
D
= 3.2 A
MIN.
60
2.1
-
-
-
-
TYP.
70
3.0
1
0.1
10
0.07
MAX.
-
4.0
10
1.0
100
0.10
UNIT
V
V
µA
mA
nA
Ω
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise specified
SYMBOL
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
PARAMETER
Forward transconductance
Input capacitance
Output capacitance
Feedback capacitance
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
CONDITIONS
V
DS
= 25 V; I
D
= 3.2 A
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
V
DD
= 30 V; I
D
= 3 A;
V
GS
= 10 V; R
GS
= 50
Ω;
R
gen
= 50
Ω
MIN.
-
-
-
-
-
-
-
-
TYP.
6.0
650
240
120
10
35
60
55
MAX.
-
825
350
160
20
55
90
80
UNIT
S
pF
pF
pF
ns
ns
ns
ns
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25 ˚C unless otherwise specified
SYMBOL
I
DR
I
DRM
V
SD
t
rr
Q
rr
PARAMETER
Continuous reverse drain
current
Pulsed reverse drain current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
CONDITIONS
-
-
I
F
= 3.2 A; V
GS
= 0 V
I
F
= 3.2 A; -dI
F
/dt = 100 A/µs;
V
GS
= -10 V; V
R
= 30 V
MIN.
-
-
-
-
-
TYP.
-
-
0.85
70
0.25
MAX.
3.2
13
1.1
-
-
UNIT
A
A
V
ns
µC
AVALANCHE LIMITING VALUE
SYMBOL
W
DSS
PARAMETER
Drain-source non-repetitive
unclamped inductive turn-off
energy
CONDITIONS
I
D
= 3.2 A; V
DD
≤
25 V;
V
GS
= 10 V; R
GS
= 50
Ω;
T
amb
= 25 ˚C
MIN.
-
TYP.
-
MAX.
45
UNIT
mJ
September 1995
2
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistor
BUK483-60A
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
100
ID / A
BUK483-60A
10
S
RD
=
N)
(O
VD
S/
ID
tp = 10 us
100 us
1 ms
10 ms
1
DC
0.1
100 ms
1s
10 s
0
20
40
60
80
Tamb / C
100
120
140
0.01
0.1
1
10
VDS / V
100
Fig.1. Normalised power dissipation.
PD% = 100
⋅
P
D
/P
D 25 ˚C
= f(T
amb
)
ID%
Normalised Current Derating
Fig.4. Safe operating area T
amb
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
ID / A
20
10
7
8
7
6
5
4
3
2
1
4
0
0.5
1
VDS / V
1.5
2
VGS / V = 5
6
120
110
100
90
80
70
60
50
40
30
20
10
0
10
9
0
20
40
60
80
Tamb / C
100
120
140
0
Fig.2. Normalised continuous drain current.
ID% = 100
⋅
I
D
/I
D 25 ˚C
= f(T
amb
); conditions: V
GS
≥
10 V
Zth j-amb / (K/W)
BUKX83
Fig.5. Typical output characteristics, T
j
= 25 ˚C.
I
D
= f(V
DS
); parameter V
GS
RDS(ON) / Ohm
1.2
4
VGS / V = 4.5
1
0.8
0.6
1E+02
D=
0.5
0.2
0.1
0.05
0.02
P
D
t
p
D=
t
p
T
1E+01
1E+00
5
0.4
0.2
0
0
2
4
ID / A
6
8
1E-01
0
1E-02
1E-07
1E-05
1E-03
t/s
1E-01
T
t
6
7
10
1E+01
1E+03
Fig.3. Transient thermal impedance.
Z
th j-amb
= f(t); parameter D = t
p
/T
Fig.6. Typical on-state resistance, T
j
= 25 ˚C.
R
DS(ON)
= f(I
D
); parameter V
GS
September 1995
3
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistor
BUK483-60A
10
9
8
7
6
5
4
3
2
ID / A
4
VGS(TO) / V
max.
3
typ.
min.
2
25
Tj / C = 150
1
1
0
0
2
4
VGS / V
6
8
10
0
-60
-40
-20
0
20
40
60
Tj / C
80
100
120
140
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
) ; conditions: V
DS
= 25 V; parameter T
j
gfs / S
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
ID / A
SUB-THRESHOLD CONDUCTION
10
9
8
7
6
5
4
3
2
1
0
1E-01
1E-02
1E-03
2%
typ
98 %
1E-04
1E-05
1E-06
0
2
4
ID / A
6
8
10
0
1
2
VGS / V
3
4
Fig.8. Typical transconductance, T
j
= 25 ˚C.
g
fs
= f(I
D
); conditions: V
DS
= 25 V
a
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
Normalised RDS(ON) = f(Tj)
10000
C / pF
BUK4y3-50
1.5
1000
1.0
Ciss
Coss
100
0.5
Crss
0
-60 -40 -20
0
20
40 60
Tj / C
80
100 120 140
10
0
20
VDS / V
40
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 3.2 A; V
GS
= 10 V
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
September 1995
4
Rev 1.200
Philips Semiconductors
Product specification
PowerMOS transistor
BUK483-60A
15
VGS / V
120
110
100
90
80
70
60
50
40
30
20
10
0
WDSS%
Normalised Avalanche Energy
10
VDS / V =12
48
5
0
0
5
10
QG / nC
15
20
20
40
60
80
100
Tamb/ C
120
140
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 3.2 A; parameter V
DS
ID / A
Fig.15. Normalised avalanche energy rating.
W
DSS
% = f(T
amb
); conditions: I
D
= 3.2 A
10
9
8
7
6
5
+
L
VDS
VGS
Tj / C = 150
25
VDD
-
-ID/100
T.U.T.
R 01
shunt
4
3
2
1
0
0
0.5
VSDS / V
1
1.5
0
RGS
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
Fig.16. Avalanche energy test circuit.
2
W
DSS
=
0.5
⋅
LI
D
⋅
BV
DSS
/(BV
DSS
−
V
DD
)
September 1995
5
Rev 1.200
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