74LVC1G53
2-channel analog multiplexer/demultiplexer
Rev. 01 — 10 January 2006
Product data sheet
1. General description
The 74LVC1G53 is a high-performance, low-power, low-voltage, Si-gate CMOS device
that provides superior performance to most advanced CMOS compatible TTL families.
The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select
input (S), two independent inputs/outputs (B0 and B1), a common input/output (A) and an
active LOW enable input (E). When pin E is HIGH, the switch is turned off.
The 74LVC1G53 can handle both analog and digital signals.
2. Features
s
Wide supply voltage range from 1.65 V to 5.5 V
s
Very low ON resistance:
x
7.5
Ω
(typical) at V
CC
= 2.7 V
x
6.5
Ω
(typical) at V
CC
= 3.3 V
x
6
Ω
(typical) at V
CC
= 5 V
s
High noise immunity
s
ESD protection:
x
HBM JESD22-A114-C exceeds 2000 V
x
MM JESD22-A115-A exceeds 200 V
x
CDM JESD22-C101-C exceeds 1000 V
s
CMOS low-power consumption
s
Latch-up performance meets requirements of JESD 78 Class I
s
Direct interface with TTL levels
s
Control inputs accepts voltages up to 5 V
s
Multiple package options
s
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
Philips Semiconductors
74LVC1G53
2-channel analog multiplexer/demultiplexer
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; t
r
= t
f
≤
2.5 ns; minimum and maximum values at T
amb
=
−
40
°
C to +85
°
C;
typical values at T
amb
= 25
°
C.
Symbol
t
on
Parameter
turn-on time
S to A or Bn
C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 3.3 V
V
CC
= 5.0 V
E to A or Bn
C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 3.3 V
V
CC
= 5.0 V
t
off
turn-off time
S to A or Bn
C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 3.3 V
V
CC
= 5.0 V
E to A or Bn
C
L
= 50 pF; R
L
= 500
Ω
V
CC
= 3.3 V
V
CC
= 5.0 V
C
i
C
S(OFF)
C
S(ON)
input capacitance
OFF-state capacitance
ON-state capacitance
2.0
1.3
-
-
-
3.7
2.9
2.5
6.0
18
5.0
3.8
-
-
-
ns
ns
pF
pF
pF
1.1
1.0
4.0
2.9
5.4
3.8
ns
ns
1.2
1.0
2.2
1.7
3.8
2.6
ns
ns
1.8
1.3
3.4
2.6
5.0
3.8
ns
ns
Conditions
Min
Typ
Max
Unit
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74LVC1G53DC
−40 °C
to +125
°C
Description
Version
SOT765-1
VSSOP8 plastic very thin shrink small
outline package; 8 leads;
body width 2.3 mm
XSON8
Type number
74LVC1G53GT
−40 °C
to +125
°C
plastic extremely thin small outline SOT833-1
package; no leads; 8 terminals;
body 1
×
1.95
×
0.5 mm
5. Marking
Table 3:
Marking
Marking code
V53
V53
Type number
74LVC1G53DC
74LVC1G53GT
74LVC1G53_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 10 January 2006
2 of 23
Philips Semiconductors
74LVC1G53
2-channel analog multiplexer/demultiplexer
6. Functional diagram
6 B1
7 B0
E
2
S 5
A 1
001aad386
Fig 1. Logic symbol
B0
S
A
B1
E
001aad387
Fig 2. Logic diagram
7. Pinning information
7.1 Pinning
53
A
A
E
GND
GND
1
2
3
4
001aad388
1
8
V
CC
8
V
CC
B0
B1
S
53
7
6
5
E
2
7
B0
GND
3
6
B1
GND
4
5
S
001aad389
Transparent top view
Fig 3. Pin configuration VSSOP8
Fig 4. Pin configuration XSON8
74LVC1G53_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 10 January 2006
3 of 23
Philips Semiconductors
74LVC1G53
2-channel analog multiplexer/demultiplexer
7.2 Pin description
Table 4:
Symbol
A
E
GND
GND
S
B1
B0
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
Description
common A output or input
enable input (active LOW)
ground (0 V)
ground (0 V)
select input
independent B1 input or output
independent B0 input or output
supply voltage
8. Functional description
8.1 Function table
Table 5:
Input
S
L
H
X
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Function table
[1]
Channel on
E
L
L
H
B0 to A or A to B0
B1 to A or A to B1
Z (switch off)
74LVC1G53_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 10 January 2006
4 of 23
Philips Semiconductors
74LVC1G53
2-channel analog multiplexer/demultiplexer
9. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
SK
V
SW
I
SW
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping
current
switch clamping
current
switch voltage
switch current
quiescent supply
current
ground current
storage temperature
total power
dissipation
Conditions
[1]
Min
−0.5
−0.5
-
-
−0.5
-
-
-
−65
Max
+6.5
+6.5
−50
±50
Unit
V
V
mA
mA
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5
enable and disable mode
V
SW
=
−0.5
V to (V
CC
+ 0.5 V)
V
CC
+ 0.5 V
±50
100
−100
+150
300
mA
mA
mA
°C
mW
T
amb
=
−40 °C
to +125
°C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For VSSOP8 package: above 110
°C
the value of P
tot
derates linearly with 8 mW/K.
For XSON8 package: above 45
°C
the value of P
tot
derates linearly with 2.4 mW/K.
10. Recommended operating conditions
Table 7:
Symbol
V
CC
V
I
V
SW
T
amb
∆t/∆V
Recommended operating conditions
Parameter
supply voltage
input voltage
switch voltage
ambient temperature
input transition rise and V
CC
= 1.65 V to 2.7 V
fall rate
V
CC
= 2.7 V to 5.5 V
[2]
[2]
Conditions
Min
1.65
0
Typ
-
-
-
-
-
-
Max
5.5
5.5
V
CC
+125
20
10
Unit
V
V
V
°C
ns/V
ns/V
enable and disable
mode
[1]
0
−40
0
0
[1]
To avoid drawing V
CC
current out of terminal A when switch current flows in terminal Bn, the voltage drop
across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal A, no V
CC
current will flow out of terminal Bn. In this case, there is no limit for the voltage drop across the switch.
Applies to control signal levels.
[2]
74LVC1G53_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 10 January 2006
5 of 23
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