74HC3G07-Q100;
74HCT3G07-Q100
Triple buffer with open-drain outputs
Rev. 2 — 11 December 2013
Product data sheet
1. General description
The 74HC3G07-Q100; 74HCT3G07-Q100 is a triple buffer with open-drain outputs. Inputs
include clamp diodes that enable the use of current limiting resistors to interface inputs to
voltages in excess of V
CC
.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Input levels:
For 74HC3G07-Q100: CMOS level
For 74HCT3G07-Q100: TTL level
Complies with JEDEC standard no. 7 A
Wide supply voltage range from 2.0 V to 6.0 V
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74HC3G07DP-Q100
74HCT3G07DP-Q100
74HC3G07DC-Q100
74HCT3G07DC-Q100
40 C
to +125
C
40 C
to +125
C
Description
Version
SOT505-2
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
Type number
VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
NXP Semiconductors
74HC3G07-Q100; 74HCT3G07-Q100
Triple buffer with open-drain outputs
4. Marking
Table 2.
Marking code
Marking code
[1]
H07
T07
H07
T07
Type number
74HC3G07DP-Q100
74HCT3G07DP-Q100
74HC3G07DC-Q100
74HCT3G07DC-Q100
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
1A
1Y
1A
1Y
1
2A
2Y
2A
2Y
Y
3A
3Y
3A
001aah762
1
3Y
001aah763
A
GND
mna591
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one buffer)
6. Pinning information
6.1 Pinning
74HC3G07-Q100
74HCT3G07-Q100
1A
3Y
2A
GND
1
2
3
4
aaa-009065
8
7
6
5
V
CC
1Y
3A
2Y
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
74HC_HCT3G07_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 11 December 2013
2 of 13
NXP Semiconductors
74HC3G07-Q100; 74HCT3G07-Q100
Triple buffer with open-drain outputs
6.2 Pin description
Table 3.
Symbol
1A, 2A, 3A
GND
1Y, 2Y, 3Y
V
CC
Pin description
Pin
1, 3, 6
4
7, 5, 2
8
Description
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Input nA
L
H
[1]
Function table
[1]
Output nY
L
Z
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
D
[1]
[2]
Parameter
supply voltage
input clamping current
output clamping current
output voltage
output current
supply current
ground current
storage temperature
dynamic power dissipation
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V
active mode
high-impedance mode
V
O
=
0.5
V to 7.0 V
[1]
[1]
[1]
[1]
[1]
[1]
[1]
Min
0.5
-
20
0.5
0.5
25
-
50
65
-
Max
7.0
20
-
V
CC
+ 0.5
7.0
-
50
-
+150
300
Unit
V
mA
mA
V
V
mA
mA
mA
C
mW
T
amb
=
40 C
to +125
C
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55
C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C
the value of P
tot
derates linearly with 8 mW/K.
74HC_HCT3G07_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 11 December 2013
3 of 13
NXP Semiconductors
74HC3G07-Q100; 74HCT3G07-Q100
Triple buffer with open-drain outputs
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC3G07-Q100
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
6.0
V
CC
+125
625
139
83
74HCT3G07-Q100
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
5.5
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V). All typical values are measured at T
amb
= 25
C.
Symbol Parameter
74HC3G07-Q100
V
IH
HIGH-level input
voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level input
voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OL
LOW-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
O
= 5.2 mA; V
CC
= 6.0 V
I
I
I
LO
I
CC
C
I
input leakage
current
output leakage
current
supply current
input capacitance
V
I
= V
CC
or GND; V
CC
= 6.0 V
V
I
= V
IH
; V
O
= V
CC
or GND
per input pin; V
CC
= 6.0 V;
V
I
= V
CC
or GND; I
O
= 0 A;
-
-
-
-
-
-
-
-
-
0
0
0
0.15
0.16
-
-
-
1.5
0.1
0.1
0.1
0.33
0.33
0.1
5.0
10
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1.0
10
20
-
V
V
V
V
V
A
A
A
pF
1.5
3.15
4.2
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
Conditions
40 C
to +85
C
Min
Typ
[1]
Max
40 C
to +125
C
Min
Max
Unit
74HC_HCT3G07_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 11 December 2013
4 of 13
NXP Semiconductors
74HC3G07-Q100; 74HCT3G07-Q100
Triple buffer with open-drain outputs
Table 7.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V). All typical values are measured at T
amb
= 25
C.
Symbol Parameter
74HCT3G07-Q100
V
IH
V
IL
V
OL
HIGH-level input
voltage
LOW-level input
voltage
LOW-level output
voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
I
I
LO
I
CC
I
CC
C
I
[1]
Conditions
40 C
to +85
C
Min
2.0
-
Typ
[1]
1.6
1.2
Max
-
0.8
40 C
to +125
C
Min
2.0
-
Max
-
0.8
Unit
V
V
-
-
-
-
-
-
-
0
0.15
-
-
-
-
1.5
0.1
0.33
1.0
5.0
10
375
-
-
-
-
-
-
-
-
0.1
0.4
1.0
10
20
410
-
V
V
A
A
A
A
pF
input leakage
current
output leakage
current
supply current
additional supply
current
input capacitance
V
I
= V
CC
or GND; V
CC
= 5.5 V
V
I
= V
IH
; V
O
= V
CC
or GND
per input pin; V
CC
= 5.5 V;
V
I
= V
CC
or GND; I
O
= 0 A;
per input; V
CC
= 4.5 V to 5.5 V;
V
I
= V
CC
2.1 V; I
O
= 0 A
Typical values are measured at T
amb
= 25
C.
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); all typical values are measured at T
amb
= 25
C; for test circuit, see
Figure 6.
Symbol Parameter
74HC3G07-Q100
t
PZL
OFF-state to LOW
propagation delay
nA to nY; see
Figure 5
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
t
PLZ
LOW to OFF-state
propagation delay
nA to nY; see
Figure 5
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
t
THL
HIGH to LOW output nY; see
Figure 5
transition time
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
C
PD
power dissipation
capacitance
V
I
= GND to V
CC
[1]
Conditions
40 C
to +85
C
Min
Typ
Max
40 C
to +125
C
Min
Max
Unit
-
-
-
-
-
-
-
-
-
-
25
9
7
25
11
10
18
6
5
4
95
19
16
95
23
23
95
19
16
-
-
-
-
-
-
-
-
-
-
-
125
25
20
125
30
26
125
25
20
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
74HC_HCT3G07_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 11 December 2013
5 of 13
模拟与混合信号
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
