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IS61SP6464-133TQ

产品描述Standard SRAM, 64KX64, 5ns, CMOS, PQFP128,
产品类别存储    存储   
文件大小494KB,共20页
制造商Integrated Circuit Solution Inc
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IS61SP6464-133TQ概述

Standard SRAM, 64KX64, 5ns, CMOS, PQFP128,

IS61SP6464-133TQ规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Integrated Circuit Solution Inc
包装说明QFP, QFP128,.63X.87,20
Reach Compliance Codeunknown
最长访问时间5 ns
最大时钟频率 (fCLK)133 MHz
I/O 类型COMMON
JESD-30 代码R-PQFP-G128
JESD-609代码e0
内存密度4194304 bit
内存集成电路类型STANDARD SRAM
内存宽度64
端子数量128
字数65536 words
字数代码64000
工作模式SYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织64KX64
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码QFP
封装等效代码QFP128,.63X.87,20
封装形状RECTANGULAR
封装形式FLATPACK
并行/串行PARALLEL
电源3.3 V
认证状态Not Qualified
最大待机电流0.02 A
最小待机电流3.14 V
最大压摆率0.28 mA
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.5 mm
端子位置QUAD
Base Number Matches1

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IS61SP6464
64K x 64 SYNCHRONOUS
PIPELINE STATIC RAM
FEATURES
• Fast access time:
– 133, 117, 100 MHz; 6 ns (83 MHz);
7 ns (75 MHz); 8 ns (66 MHz)
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
control
• Pentium™ or linear burst sequence control
using MODE input
• Five chip enables for simple depth expansion
and address pipelining
• Common data inputs and data outputs
• Power-down control by ZZ input
• JEDEC 128-Pin LQFP and PQFP 14mm x
20mm package
• Single +3.3V power supply
• Control pins mode upon power-up:
– MODE in interleave burst mode
– ZZ in normal operation mode
These control pins can be connected to GND
Q
or V
CCQ
to alter their power-up state
DESCRIPTION
The
ICSI
IS61SP6464 is a high-speed, low-power synchro-
nous static RAM designed to provide a burstable, high-perfor-
mance, secondary cache for the i486™, Pentium™, 680X0™,
and PowerPC™ microprocessors. It is organized as 65,536
words by 64 bits, fabricated with
ICSI
's advanced CMOS
technology. The device integrates a 2-bit burst counter, high-
speed SRAM core, and high-drive capability outputs into a
single monolithic circuit. All synchronous inputs pass through
registers controlled by a positive-edge-triggered single clock
input.
Write cycles are internally self-timed and are initiated by the
rising edge of the clock input. Write cycles can be from one to
eight bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
BW1
controls I/O1-I/O8,
BW2
controls I/O9-I/O16,
BW3
con-
trols I/O17-I/O24,
BW4
controls I/O25-I/O32,
BW5
controls
I/O33-I/O40,
BW6
controls I/O41-I/O48,
BW7
controls I/O49-
I/O56,
BW8
controls I/O57-I/O64, conditioned by
BWE
being
LOW. A LOW on
GW
input would cause all bytes to be written.
Bursts can be initiated with either
ADSP
(Address Status
Processor) or
ADSC
(Address Status Cache Controller) input
pins. Subsequent burst addresses can be generated internally
by the IS61SP6464 and controlled by the
ADV
(burst address
advance) input pin.
Asynchronous signals include output enable (OE), sleep mode
input (ZZ), and burst mode input (MODE). A HIGH input on the
ZZ pin puts the SRAM in the power-down state. When ZZ is
pulled LOW (or no connect), the SRAM normally operates after
the wake-up period. A LOW input, i.e., GND
Q
, on MODE pin
selects LINEAR Burst. A V
CCQ
(or no connect) on MODE pin
selects INTERLEAVED Burst.
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
SSR009-0B
1

IS61SP6464-133TQ相似产品对比

IS61SP6464-133TQ IS61SP6464-100TQ IS61SP6464-133PQ IS61SP6464-117PQ IS61SP6464-100PQ IS61SP6464-117TQ
描述 Standard SRAM, 64KX64, 5ns, CMOS, PQFP128, Standard SRAM, 64KX64, 5ns, CMOS, PQFP128, Standard SRAM, 64KX64, 5ns, CMOS, PQFP128, Standard SRAM, 64KX64, 5ns, CMOS, PQFP128, Standard SRAM, 64KX64, 5ns, CMOS, PQFP128, Standard SRAM, 64KX64, 5ns, CMOS, PQFP128,
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合
包装说明 QFP, QFP128,.63X.87,20 QFP, QFP128,.63X.87,20 QFP, QFP128,.67X.93,20 QFP, QFP128,.67X.93,20 QFP, QFP128,.67X.93,20 QFP, QFP128,.63X.87,20
Reach Compliance Code unknown unknown unknown unknown unknown unknown
最长访问时间 5 ns 5 ns 5 ns 5 ns 5 ns 5 ns
最大时钟频率 (fCLK) 133 MHz 100 MHz 133 MHz 117 MHz 100 MHz 117 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-PQFP-G128 R-PQFP-G128 R-PQFP-G128 R-PQFP-G128 R-PQFP-G128 R-PQFP-G128
JESD-609代码 e0 e0 e0 e0 e0 e0
内存密度 4194304 bit 4194304 bit 4194304 bit 4194304 bit 4194304 bit 4194304 bit
内存集成电路类型 STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
内存宽度 64 64 64 64 64 64
端子数量 128 128 128 128 128 128
字数 65536 words 65536 words 65536 words 65536 words 65536 words 65536 words
字数代码 64000 64000 64000 64000 64000 64000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
组织 64KX64 64KX64 64KX64 64KX64 64KX64 64KX64
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 QFP QFP QFP QFP QFP QFP
封装等效代码 QFP128,.63X.87,20 QFP128,.63X.87,20 QFP128,.67X.93,20 QFP128,.67X.93,20 QFP128,.67X.93,20 QFP128,.63X.87,20
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 FLATPACK FLATPACK FLATPACK FLATPACK FLATPACK FLATPACK
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
电源 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
最大待机电流 0.02 A 0.02 A 0.02 A 0.02 A 0.02 A 0.02 A
最小待机电流 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V
最大压摆率 0.28 mA 0.25 mA 0.28 mA 0.27 mA 0.25 mA 0.27 mA
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子形式 GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
端子节距 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm
端子位置 QUAD QUAD QUAD QUAD QUAD QUAD
厂商名称 Integrated Circuit Solution Inc Integrated Circuit Solution Inc Integrated Circuit Solution Inc - Integrated Circuit Solution Inc Integrated Circuit Solution Inc
Base Number Matches 1 1 1 1 - -

 
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