Octal Buffers & Line Drivers, Inverted Three-State Outputs
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
Three-state outputs drive bus lines or buffer memory address
registers
1.2μ
CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
UT54ACS240 - SMD 5962-96568
UT54ACTS240 - SMD 5962-96569
DESCRIPTION
The UT54ACS240 and the UT54ACTS240 are inverting octal
buffer and line drivers which improve the performance and den-
sity of three-state memory address drivers, clock drivers, and
bus-oriented receivers and transmitters.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
INPUTS
1G, 2G
L
L
H
A
L
H
X
OUTPUT
Y
H
L
Z
PINOUTS
20-Pin DIP
Top View
1G
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
V
SS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
2G
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
20-Lead Flatpack
Top View
1G
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
V
SS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
2G
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
LOGIC SYMBOL
1G
1A1
(1)
(2)
EN
(18)
(16)
(14)
(12)
1Y1
1Y2
1Y3
1Y4
(4)
1A2
(6)
1A3
(8)
1A4
(19)
(11)
2G
2A1
EN
(9)
(7)
(5)
(3)
2Y1
2Y2
2Y3
2Y4
(13)
2A2
(15)
2A3
(17)
2A4
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
1
LOGIC DIAGRAM
1G (1)
2G (19)
1A1
(2)
(18)
1Y1
2A1
(11)
(9)
2Y1
1A2
(4)
(16)
1Y2
2A2
(13)
(7)
2Y2
1A3
(6)
(14)
1Y3
2A3
(15)
(5)
2Y3
1A4
(8)
(12)
1Y4
2A4
(17)
(3)
2Y4
2
OPERATIONAL ENVIRONMENT
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
Θ
JC
I
I
P
D
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at
these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+.3
-65 to +150
+175
+300
20
±10
1
UNITS
V
V
°C
°C
°C
°C/W
mA
W
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
4.5 to 5.5
0 to V
DD
-55 to + 125
UNITS
V
V
°C
3
DC ELECTRICAL CHARACTERISTICS
7
(V
DD
= 5.0V
±
10%; V
SS
= 0V
6
, -55°C < T
C
< +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
V
IL
PARAMETER
Low-level input voltage
1
ACTS
ACS
High-level input voltage
1
ACTS
ACS
Input leakage current
ACTS/ACS
Low-level output voltage
3
ACTS
ACS
High-level output voltage
3
ACTS
ACS
Three-state output leakage current
Short-circuit output current
2 ,4
ACTS/ACS
Output current
10
(Sink)
I
OH
Output current
10
(Source)
P
total
I
DDQ
ΔI
DDQ
Power dissipation
2, 8, 9
Quiescent Supply Current
Quiescent Supply Current Delta
ACTS
V
IN
= V
DD
or V
SS
I
OL
= 12.0mA
I
OL
= 100μA
I
OH
= -12.0mA
I
OH
= -100μA
V
O
= V
DD
and V
SS
V
O
= V
DD
and V
SS
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
V
IN
= V
DD
or V
SS
V
OH
= V
DD
- 0.4V
C
L
= 50pF
V
DD
= 5.5V
For input under test
V
IN
= V
DD
- 2.1V
For all other inputs
V
IN
= V
DD
or V
SS
V
DD
= 5.5V
C
IN
C
OUT
Input capacitance
5
Output capacitance
5
ƒ
= 1MHz @ 0V
ƒ
= 1MHz @ 0V
15
15
pF
pF
2.1
10
1.6
mW/
MHz
μA
mA
-12
mA
.7V
DD
V
DD
- 0.25
-30
-300
12
30
300
.5V
DD
.7V
DD
-1
1
0.40
0.25
CONDITION
MIN
MAX
0.8
.3V
DD
UNIT
V
V
IH
V
I
IN
V
OL
μA
V
V
OH
V
μA
mA
mA
I
OZ
I
OS
I
OL
4
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%, -
50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density
≤
5.0E5 amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765
pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose
≤
1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
最近工作需要用到，找到一份资料与大家分享下
What is new with SoCs
By Gene Frantz
TI Principal Fellow and Business Development Manager, DSP
Another comment we received re ......
2008年7月9日, CombOLED 研究项目的工作重点是开发出高性价比的生产工艺，以实现有机发光二极管 (OLED) 的量产。欧司朗光电半导体公司固态照明部主管 Bernhard Stapp 表示：“该项目由欧盟提供资金支持，欧司朗负责协调运作，旨在为推行新型照明光源应用创造必要的条件。”这包括采用性价比卓越的方法构建新型元件架构，从而生产出大幅面透明光源。作为 LED 市场的创新推...[详细]
UHF和HF都是一般的技术分类，不过每一类都有独立的支持协议。HF在13.56MHz频段更具有一致性，虽然国际业内行业标准很多。UHF RFID在858-960MHz频段已商业化。同时也有多种国际标准支持，包括EPC global Gen 2。 标签与读写器通过无线链接交换数据。链接可以通过适合任何频段的、具有不同读取范围和抗干扰性的EMF或RF场实现。HF RFID技术主要通过电磁场传送信...[详细]
ABI Research最近评选并公布了全球超高频无源和高频无源 RFID芯片的前十大制造商。 前十大超高频无源芯片制造商是： 前十大高频无源芯片制造商是： 超高频的得奖名单并不出人意外，因为实际上似乎总是前三家公司获得大订单。ABI分析家 Mike Liard称，ABI很容易就评选出 Alien、Avery,和 Raflatac为全球...[详细]
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
