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5962H9659601QXC

产品描述NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14
产品类别逻辑    逻辑   
文件大小93KB,共17页
制造商Cobham PLC
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5962H9659601QXC概述

NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14

5962H9659601QXC规格参数

参数名称属性值
包装说明DFP, FL14,.3
Reach Compliance Codeunknown
ECCN代码3A001.A.1.A
系列AC
JESD-30 代码R-XDFP-F14
JESD-609代码e4
长度9.525 mm
逻辑集成电路类型NOR GATE
最大I(ol)0.008 A
功能数量2
输入次数4
端子数量14
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DFP
封装等效代码FL14,.3
封装形状RECTANGULAR
封装形式FLATPACK
电源5 V
Prop。Delay @ Nom-Sup14 ns
传播延迟(tpd)12 ns
认证状态Qualified
施密特触发器NO
筛选级别38535Q/M;38534H;883B
座面最大高度2.921 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层GOLD
端子形式FLAT
端子节距1.27 mm
端子位置DUAL
总剂量1M Rad(Si) V
宽度6.2865 mm
Base Number Matches1

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REVISIONS
LTR
A
B
DESCRIPTION
Changes in accordance with NOR 5962-R136-97. - JB
Add limit for linear energy threshold (LET) with no latch-up in section 1.5.
Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes
throughout. - TVN
DATE (
YR-MO-DA
)
96-11-20
07-01-22
APPROVED
Monica L. Poelking
Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
B
15
B
16
REV
SHEET
PREPARED BY
Larry T. Gauder
CHECKED BY
Thanh V. Nguyen
APPROVED BY
Monica L. Poelking
DRAWING APPROVAL DATE
96-04-19
REVISION LEVEL
SIZE
CAGE CODE
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
B
10
B
11
B
12
B
13
B
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
MICROCIRCUIT, DIGITAL, RADIATION HARDENED,
ADVANCED CMOS, DUAL 4-INPUT NOR GATE,
MONOLITHIC SILICON
AMSC N/A
B
A
SHEET
1
67268
OF
16
5962-96596
DSCC FORM 2233
APR 97
5962-E178-07

5962H9659601QXC相似产品对比

5962H9659601QXC 5962H9659601VXC 5962H9659601VCC 5962H9659601VXA 5962H9659601QXA 5962H9659601QCC 5962H9659601VCA 5962H9659601QCA
描述 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14 NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14
包装说明 DFP, FL14,.3 DFP, FL14,.3 DIP, DIP14,.3 DFP, FL14,.3 DFP, FL14,.3 DIP, DIP14,.3 DIP, DIP14,.3 DIP, DIP14,.3
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown
ECCN代码 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A
系列 AC AC AC AC AC AC AC AC
JESD-30 代码 R-XDFP-F14 R-XDFP-F14 R-XDIP-T14 R-XDFP-F14 R-XDFP-F14 R-XDIP-T14 R-XDIP-T14 R-XDIP-T14
JESD-609代码 e4 e4 e4 e0 e0 e4 e0 e0
长度 9.525 mm 9.525 mm 19.43 mm 9.525 mm 9.525 mm 19.43 mm 19.43 mm 19.43 mm
逻辑集成电路类型 NOR GATE NOR GATE NOR GATE NOR GATE NOR GATE NOR GATE NOR GATE NOR GATE
最大I(ol) 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A
功能数量 2 2 2 2 2 2 2 2
输入次数 4 4 4 4 4 4 4 4
端子数量 14 14 14 14 14 14 14 14
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DFP DFP DIP DFP DFP DIP DIP DIP
封装等效代码 FL14,.3 FL14,.3 DIP14,.3 FL14,.3 FL14,.3 DIP14,.3 DIP14,.3 DIP14,.3
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 FLATPACK FLATPACK IN-LINE FLATPACK FLATPACK IN-LINE IN-LINE IN-LINE
电源 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
Prop。Delay @ Nom-Sup 14 ns 14 ns 14 ns 14 ns 14 ns 14 ns 14 ns 14 ns
传播延迟(tpd) 12 ns 12 ns 12 ns 12 ns 12 ns 12 ns 12 ns 12 ns
认证状态 Qualified Qualified Qualified Qualified Qualified Qualified Qualified Qualified
施密特触发器 NO NO NO NO NO NO NO NO
筛选级别 38535Q/M;38534H;883B 38535V;38534K;883S 38535V;38534K;883S 38535V;38534K;883S 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535V;38534K;883S 38535Q/M;38534H;883B
座面最大高度 2.921 mm 2.921 mm 5.08 mm 2.921 mm 2.921 mm 5.08 mm 5.08 mm 5.08 mm
最大供电电压 (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES YES NO YES YES NO NO NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
端子面层 GOLD GOLD GOLD TIN LEAD TIN LEAD GOLD TIN LEAD TIN LEAD
端子形式 FLAT FLAT THROUGH-HOLE FLAT FLAT THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
端子节距 1.27 mm 1.27 mm 2.54 mm 1.27 mm 1.27 mm 2.54 mm 2.54 mm 2.54 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
总剂量 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V
宽度 6.2865 mm 6.2865 mm 7.62 mm 6.2865 mm 6.2865 mm 7.62 mm 7.62 mm 7.62 mm
Base Number Matches 1 1 1 1 1 1 1 1

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