Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and
more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas
Technology Corp. product best suited to the customer's application; they do not convey any license
under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or
a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-
party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or
circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and
algorithms represents information on products at the time of publication of these materials, and are
subject to change by Renesas Technology Corp. without notice due to product improvements or
other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or
an authorized Renesas Technology Corp. product distributor for the latest product information
before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising
from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means,
including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data,
diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total
system before making a final decision on the applicability of the information and products. Renesas
Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the
information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or
system that is used under circumstances in which human life is potentially at stake. Please contact
Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when
considering the use of a product contained herein for any specific purposes, such as apparatus or
systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in
whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must
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Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the
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8. Please contact Renesas Technology Corp. for further details on these materials or the products
contained therein.
Rev. 4.00 Jan 26, 2006 page ii of xxii
Preface
The H8/3067 Group is a series of high-performance single-chip microcontrollers that integrate
system supporting functions together with an H8/300H CPU core.
The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a
concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address
space.
The on-chip supporting functions include ROM, RAM, 16-bit timers, 8-bit timers, a
programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial communication
interface (SCI), an A/D converter, a D/A converter, I/O ports, a DMA controller (DMAC), and
other facilities. The three-channel SCI has been expanded to support the ISO/IEC7816-3 smart
card interface. Functions have also been added to reduce power consumption in battery-powered
applications: individual modules can be placed in standby, and the frequency of the system clock
supplied to the chip can be divided down under software control.
The address space is divided into eight areas. The data bus width and access cycle length can be
selected independently in each area, simplifying the connection of different types of memory.
Seven MCU operating modes (modes 1 to 7) are provided, offering a choice of data bus width and
address space size.
With these features, the H8/3067 Group offers easy implementation of compact, high-performance
systems.
In addition to its mask ROM versions, the H8/3067 Group has an F-ZTAT™* version with on-
chip flash memory that can be programmed on-board. This version enables users to respond
quickly and flexibly to changing application specifications.
This manual describes the H8/3067 Group hardware. For details of the instruction set, refer to the
H8/300H Series Programming Manual.
Note: * F-ZTAT™ (Flexible ZTAT) is a registered trademark of Renesas Technology Corp.
Rev. 4.00 Jan 26, 2006 page iii of xxii
Main Revisions in This Edition
Item
All
Page
Revision (See Manual for Details)
Company name changed
All references to Hitachi, Hitachi, Ltd., Hitachi Semiconductors,
and other Hitachi brand names changed to Renesas Technology
Corp.
Designation for categories changed from “series” to “group”
Designation changed
H8/3067 Series
→
H8/3067 Group
Changes due to change in package codes
FP-100A
→
PRQP0100JE-B
FP-100B
→
PRQP0100KA-A
TFP-100B
→PTQP0100KA-A
1.1 Overview
Table 1.1 Features
1.4.2 Product Type
Names and Markings
6.3.5 Address
Output Method
7.2.2 I/O Address
Registers (IOAR)
—
150
215
6
Table amended
Product lineup: HD64F3067F, HD64F3067TE, HD64F3067FP
deleted
Deleted
Title amended
Description amended
An IOAR functions as a source or destination address register
depending on how the DMAC is activated: as a source address
register if activation is by a receive-data-full interrupt from serial
communication interface (SCI) channel 0 or by an A/D converter
conversion-end interrupt, and as a destination address register
otherwise.
231
Table amended
Function
Activated by SCI 0
Receive-Data-Full Interrupt
or by A/D Converter
Register Conversion-End Interrupt
7.4.2 I/O Mode
Table 7.6 Register
Functions in I/O Mode
Other
Activation
Initial Setting Operation
Rev. 4.00 Jan 26, 2006 page v of xxii