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HB54A5129F2: 产品描述256MB, 512MB Registered DDR SDRAM DIMM; 文件大小180KB，共17页; 制造商ELPIDA; 官网地址http://www.elpida.com/en

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HB54A5129F2概述

256MB, 512MB Registered DDR SDRAM DIMM

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DATA SHEET

256MB, 512MB Registered DDR SDRAM DIMM

HB54A2569F1 (32M words

72 bits, 1 Bank)

HB54A5129F2 (64M words

72 bits, 2 Banks)

Description

The HB54A2569F1, HB54A5129F2 are Double Data

Rate (DDR) SDRAM Module, mounted 256M bits DDR

SDRAM (HM5425801BTT) sealed in TSOP package, 1

piece of PLL clock driver, 2 pieces of register driver

and 1 piece of serial EEPROM (2k bits EEPROM) for

Presence Detect (PD).

The HB54A2569F1 is organized as 32M

1 bank

mounted 9 pieces of 256M bits DDR SDRAM. The

HB54A5129F2 is organized as 32M

2 banks

mounted 18 pieces of 256M bits DDR SDRAM. Read

and write operations are performed at the cross points

of the CK and the /CK. This high-speed data transfer

is realized by the 2 bits prefetch-pipelined architecture.

Data strobe (DQS) both for read and write are available

for high speed and reliable data bus design. By setting

extended mode register, the on-chip Delay Locked

Loop (DLL) can be set enable or disable. An outline of

the products is 184-pin socket type package (dual lead

out).

Therefore, it makes high density mounting

possible without surface mount technology. It provides

common data inputs and outputs.

Decoupling

capacitors are mounted beside each TSOP on the

module board.

Features

•

184-pin socket type package (dual lead out)



Outline: 133.35mm (Length)

43.18mm (Height)

4.00mm (Thickness)



Lead pitch: 1.27mm

•

2.5V power supply (VCC/VCCQ)

•

SSTL-2 interface for all inputs and outputs

•

Clock frequency: 143MHz/133MHz/125MHz (max.)

•

Data inputs, outputs and DM are synchronized with

DQS

•

4 banks can operate simultaneously and

independently (Component)

•

Burst read/write operation

•

Programmable burst length: 2, 4, 8



Burst read stop capability

•

Programmable burst sequence



Sequential



Interleave

•

Start addressing capability



Even and Odd

•

Programmable /CAS latency (CL): 3, 3.5

•

8192 refresh cycles: 7.8µs (8192/64ms)

•

2 variations of refresh



Auto refresh



Self refresh

Document No. E0091H40 (Ver. 4.0)

Date Published September 2002 (K) Japan

URL: http://www.elpida.com

Elpida

Memory, Inc. 2001-2002

Hitachi,

Ltd. 2001

Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

HB54A5129F2相似产品对比

	HB54A5129F2	HB54A5129F2-B75B	HB54A5129F2-A75B	HB54A5129F2-10B	HB54A2569F1-B75B	HB54A2569F1-10B	HB54A2569F1
描述	256MB, 512MB Registered DDR SDRAM DIMM	256MB, 512MB Registered DDR SDRAM DIMM	256MB, 512MB Registered DDR SDRAM DIMM	256MB, 512MB Registered DDR SDRAM DIMM	256MB, 512MB Registered DDR SDRAM DIMM	256MB, 512MB Registered DDR SDRAM DIMM	256MB, 512MB Registered DDR SDRAM DIMM
是否Rohs认证	-	不符合	不符合	不符合	不符合	不符合	-
厂商名称	-	ELPIDA	ELPIDA	ELPIDA	ELPIDA	ELPIDA	-
零件包装代码	-	DIMM	DIMM	DIMM	DIMM	DIMM	-
包装说明	-	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	DIMM, DIMM184	-
针数	-	184	184	184	184	184	-
Reach Compliance Code	-	unknow	unknow	unknow	unknown	unknow	-
ECCN代码	-	EAR99	EAR99	EAR99	EAR99	EAR99	-
访问模式	-	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	-
最长访问时间	-	0.7 ns	0.7 ns	0.8 ns	0.7 ns	0.8 ns	-
其他特性	-	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	-
最大时钟频率 (fCLK)	-	133 MHz	143 MHz	125 MHz	133 MHz	125 MHz	-
I/O 类型	-	COMMON	COMMON	COMMON	COMMON	COMMON	-
JESD-30 代码	-	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	-
内存密度	-	4831838208 bi	4831838208 bi	4831838208 bi	2415919104 bit	2415919104 bi	-
内存集成电路类型	-	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	-
内存宽度	-	72	72	72	72	72	-
湿度敏感等级	-	1	1	1	1	1	-
功能数量	-	1	1	1	1	1	-
端口数量	-	1	1	1	1	1	-
端子数量	-	184	184	184	184	184	-
字数	-	67108864 words	67108864 words	67108864 words	33554432 words	33554432 words	-
字数代码	-	64000000	64000000	64000000	32000000	32000000	-
工作模式	-	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	-
最高工作温度	-	55 °C	55 °C	55 °C	55 °C	55 °C	-
组织	-	64MX72	64MX72	64MX72	32MX72	32MX72	-
输出特性	-	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	-
封装主体材料	-	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	-
封装代码	-	DIMM	DIMM	DIMM	DIMM	DIMM	-
封装等效代码	-	DIMM184	DIMM184	DIMM184	DIMM184	DIMM184	-
封装形状	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-
封装形式	-	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	-
峰值回流温度（摄氏度）	-	225	225	225	225	225	-
电源	-	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	-
认证状态	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-
刷新周期	-	8192	8192	8192	8192	8192	-
自我刷新	-	YES	YES	YES	YES	YES	-
最大压摆率	-	2.726 mA	2.869 mA	2.584 mA	2.321 mA	2.224 mA	-
最大供电电压 (Vsup)	-	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	-
最小供电电压 (Vsup)	-	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	-
标称供电电压 (Vsup)	-	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	-
表面贴装	-	NO	NO	NO	NO	NO	-
技术	-	CMOS	CMOS	CMOS	CMOS	CMOS	-
温度等级	-	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	-
端子形式	-	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	-
端子节距	-	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	-
端子位置	-	DUAL	DUAL	DUAL	DUAL	DUAL	-
处于峰值回流温度下的最长时间	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-

HB54A5129F2

HB54A5129F2概述

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