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SN54ALS526, SN54ALS527, SN54ALS528
SN74ALS526, SN74ALS527, SN74ALS528
FUSE PROGRAMMABLE IDENTITY COMPARATORS
•
•
•
•
Can Be Programmed and Verified on Most
Incoming Test Equipment
Reduces Board and Package Size for
Similar Fixed Comparator Functions
High-Speed Address Recognition
Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
SDAS051A − JUNE 1994 − REVISED MAY 1986
•
•
Dependable Texas Instruments Quality and
Reliability
Programming Capabilities
’ALS526 − Fuse Programmable 16-Bit
Identity Comparator
’ALS527 − Fuse Programmable 8-Bit
Identity Comparator and 4-Bit
Comparator
’ALS528 − Fuse Programmable 12-Bit
Identity Comparator
SN54ALS528 . . . J PACKAGE
SN54ALS528 . . . DW OR N PACKAGE
(TOP VIEW)
SN54ALS526 . . . J PACKAGE
SN74ALS526 . . . DW OR N PACKAGE
(TOP VIEW)
SN54ALS527 . . . J PACKAGE
SN74ALS527 . . . DW OR N PACKAGE
(TOP VIEW)
G
P0
P1
P2
P3
P4
P5
P6
P7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
P=Q
P15
P14
P13
P12
P11
P10
P9
P8
G
P0
P1
P2
P3
P4
P5
P6
P7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
P=Q
Q11
P11
Q10
P10
Q9
P9
Q8
P8
G
P0
P1
P2
P3
P4
P5
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
P=Q
P11
P10
P9
P8
P7
P6
SN54ALS526 . . . FK PACKAGE
(TOP VIEW)
SN54ALS527 . . . FK PACKAGE
(TOP VIEW)
SN54ALS528 . . . FK PACKAGE
(TOP VIEW)
P1
P0
G
VCC
P=Q
P1
P0
G
VCC
P=Q
P2
P3
P4
P5
P6
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
P15
P14
P13
P12
P11
P2
P3
P4
P5
P6
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
Q11
P11
Q10
P10
Q9
P1
P2
NC
P3
P4
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
P0
G
NC
VCC
P=Q
P11
P10
NC
P9
P8
P7
GND
P8
P9
P10
P7
GND
P8
Q8
P9
NC−No internal connection
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1986, Texas Instruments Incorporated
5BASIC
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
P5
GND
NC
P6
P7
1
SDAS051A − JUNE 1984−REVISED MAY 1986
SN54ALS526, SN54ALS527, SN54ALS528
SN74ALS526, SN74ALS527, SN74ALS528
FUSE PROGRAMMABLE IDENTITY COMPARATORS
description
The ’ALS526 and ’ALS528 are fuse-programmable identity comparators designed for easy programming in
fixed-comparator applications. The ’ALS526 compares a 16-bit data word against a preprogrammed 16-bit data
word while the ’ALS528 compares a 12-bit data word against a preprogrammed 12-bit data word. The P = Q
output will go low when the applied data word (P inputs) matches the preprogrammed data word (Q represents
the preprogrammed data word). Programming is easily accomplished on the bench or with conventional
automatic test equipment. Special equipment such as PROM programmers are not required.
The ’ALS527 is a combination of an 8-bit fuse-programmable comparator and a conventional 4-bit comparator.
For the P = Q output to go low, the applied data word P0 through P7 must match the preprogrammed data word
Q0 through Q7, and the applied data word P8 through P11 must match the applied data word Q8 through Q11.
The SN54ALS526, SN54ALS527, and SN54ALS528 are characterized for operation over the full military
temperature range of −55°C to 125°C. The SN74ALS526, SN74ALS527, and SN74ALS528 are characterized
for operation from 0°C to 70°C.
programming procedure
Before any fuses are blown, the inputs will recognize a low logic level. Therefore, only the bits that are to
recognize a high logic level require programming. A fuse is blown by applying 12 volts (V
IHH
) to the desired P
input and also to the G input. This permanently programs the pin to recognize a high. Only one input pin should
be programmed at a time.
Step 1.
Step 2.
Step 3.
Step 4.
Take G to V
IL
and apply V
IH
to all P inputs
†
.
Take desired P input to V
IHH
, output will be low if the fuse is intact.
Pulse G to V
IHH
. After G has returned to V
IL
, the output will be high indicating that the fuse is blown.
Take P input back to V
IH
. Repeat steps 2 through 4 to program additional inputs.
verification procedure
These devices can be checked to determine which fuses, if any, are blown. Figure 1 shows how verification can
be accomplished during programming.
Take G and all P inputs
†
to V
IL
. If the output is low, all fuses are intact.
Take all P inputs
†
to V
IH.
The output should be high except when all fuses are blown. If all fuses are
blown then the output will be low.
Step 3.
Take test input to V
IHH
, leaving other inputs at V
IH
. If the output goes low, the fuse is intact. If the
output goes high, the fuse is blown.
Step 4.
Take test input back to V
IH
. Repeat steps 3 and 4 to test additional inputs.
Step 1.
Step 2.
† For the ’ALS527, P8 through P11 inputs must match the Q8 through Q11 inputs.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
SN54ALS526, SN54ALS527, SN54ALS528
SN74ALS526, SN74ALS527, SN74ALS528
FUSE PROGRAMMABLE IDENTITY COMPARATORS
SDAS051A − JUNE 1984−REVISED MAY 1986
logic symbols
†
’ALS526
2
P0
3
P1
4
P2
5
P3
6
P4
7
P5
8
P6
9
P7
11
P8
12
P9
13
P10
14
P11
15
P12
16
P13
17
P14
18
P15
G
1
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
19
P=Q
G
1
*
COMP
P8
P9
11
13
P
11
P=Q
8
Q
11
8
&
2
P0
3
P1
4
P2
5
P3
6
P4
7
P5
8
P6
9
P7
*
*
*
*
*
*
*
*
19
P=Q
’ALS527
&
15
P10
17
P11
Q8
Q9
Q10
Q11
12
14
16
18
’ALS528
2
P0
3
P1
4
P2
5
P3
6
P4
7
P5
9
P6
10
P7
11
P8
12
P9
13
P10
14
P11
G
1
*
*
*
*
*
*
*
*
*
*
*
*
*
15
P=Q
&
† These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for DW, J, and N packages.
∗These
inputs can be programmed to be active high. The asterisk is not a part of the symbol. For a correct symbol for the programmed device,
delete the polarity symbol ( ) at any input whose programming fuse has been blown.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
3
SDAS051A − JUNE 1984−REVISED MAY 1986
SN54ALS526, SN54ALS527, SN54ALS528
SN74ALS526, SN74ALS527, SN74ALS528
FUSE PROGRAMMABLE IDENTITY COMPARATORS
logic diagrams (positive logic)
’ALS526
P0
Programming
Circuit
Blown = 0
Intact = 1
’ALS527
P0
Programming
Circuit
Blown = 0
Intact = 1
P=Q
P=Q
P15
Programming
Circuit
Blown = 0
Intact = 1
P7
Programming
Circuit
Blown = 0
Intact = 1
Programming
Enable
Circuit
Programming
Enable
Circuit
G
G
P8
Q8
P9
Q9
P10
Q10
P11
Q11
’ALS528
P0
Programming
Circuit
Blown = 0
Intact = 1
P=Q
P11
Programming
Circuit
Blown = 0
Intact = 1
Programming
Enable
Circuit
G
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
DSP 与 ARM 处理器
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