• Three chip enable option for simple depth expansion
and address pipelining
• Common data inputs and data outputs
• JEDEC 100-Pin TQFP and
119-pin PBGA package
• Single +2.5V, ±5% operation
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JTAG Boundary Scan for PBGA package
DESCRIPTION
The
ISSI
IS61VF51232, IS61VF51236, and IS61VF10018
are high-speed, low-power synchronous static RAMs de-
signed to provide burstable, high-performance memory for
communication and networking applications. The
IS61VF51232 is organized as 524,288 words by 32 bits and
the IS61VF51236 is organized as 524,288 words by 36
bits. The IS61VF10018 is organized as 1,048,576 words
by 18 bits. Fabricated with
ISSI
's advanced CMOS
technology, the device integrates a 2-bit burst counter,
high-speed SRAM core, and high-drive capability outputs
into a single monolithic circuit. All synchronous inputs
pass through registers controlled by a positive-edge-
triggered single clock input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be one
to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
Byte write operation is performed by using byte write
enable (BWE).input combined with one or more individual
byte write signals (BWx). In addition, Global Write (GW)
is available for writing all bytes at one time, regardless of
the byte write controls.
Bursts can be initiated with either
ADSP
(Address Status
Processor) or
ADSC
(Address Status Cache Controller)
input pins. Subsequent burst addresses can be generated
internally and controlled by the
ADV
(burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW.
Interleave burst is achieved when this pin is tied HIGH or
left floating.
FAST ACCESS TIME
Symbol
t
KQ
t
KC
Parameter
Clock Access Time
Cycle Time
Frequency
-7.5
7.5
8
125
-8.5
8.5
10
100
Units
ns
ns
MHz
This document contains ADVANCE INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best
在全球半导体产业因景气不佳而纷传并购、整合之际，两大IT巨头三星、IBM日前却双双宣布，将强化半导体产业投资。 三星电子本周一宣布，已向韩国证券交易所提交一份申请文件，打算2008年投下10.5亿美元，用于升级内存芯片生产线、改进技术工艺，从而提高产能并降低成本。无独有偶。本周二IBM公司宣布，未来3年将投资10亿美元，用于扩充位于纽约州 East Fishkill 的半导体工厂，以消...[详细]
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
