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CY24130
HOTLink II™ SMPTE Receiver Training
Clock
Features
■
■
■
Benefits
■
■
■
Integrated phase-locked loop
Low-jitter, high-accuracy outputs
3.3V operation
Internal PLL with up to 400-MHz internal operation
Meets critical timing requirements in complex system
designs
Enables application compatibility
Table 1. Frequency table
Part Number
CY24130-1
CY24130-2
Outputs
2
2
Input Frequency
27 MHz (Driven Reference)
27 MHz (Crystal Reference)
Output Frequency Range
1 copy 27-MHz reference clock output
1 copy of 27-/36-/54-/148.5-/74.25-MHz (frequency selectable)
1 copy 27-MHz reference clock output
1 copy of 27-/36-/54-/148.5-/74.25-MHz (frequency selectable)
Logic Block Diagram
XIN
XOUT
P
PLL
REFCLK
S0
S1
S2
OSC.
Q
Φ
VCO
OUTPUT
MULTIPLEXER
AND
DIVIDERS
CLKA
VDDL
VDD
AVDD AVSS VSS VSSL
Table 2. Frequency Select Options
S2
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
CLKA
27
36
54
148.50
74.25
OFF, pulled low
OFF, pulled low
OFF, pulled low
REFCLK
27
27
27
27
27
27
27
27
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Cypress Semiconductor Corporation
Document #: 38-07711 Rev. *A
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised May 22, 2008
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CY24130
Pin Configuration
Figure 1. CY24130-1, -2, 16-pin TSSOP
XIN
VDD
AVDD
S0
AVSS
VSSL
N/C
CLKA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XOUT
S2
REFCLK
VSS
N/C
VDDL
S1
N/C
Table 3. Pin Definition
Name
XIN
V
DD
AV
DD
S0
AV
SS
V
SSL
N/C
CLKA
N/C
S1
V
DDL
N/C
VSS
REFCLK
S2
XOUT
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
Reference Crystal Input.
Voltage Supply.
Analog Voltage Supply.
Frequency Select 0.
Analog Ground.
VDDL Ground.
No Connect.
27-/36-/54-/148.50-/74.25-MHz Clock Output (frequency selectable).
No Connect.
Frequency Select 1.
Voltage Supply.
No Connect.
Ground.
Reference Clock Output.
Frequency Select 2.
Reference Crystal Output. Leave floating for -1.
Absolute Maximum Conditions
Parameter
V
DD,
AV
DD
V
DDL
T
J
Description
Supply Voltage
I/O Supply Voltage
Junction Temperature
Digital Inputs
Electro-Static Discharge
Min.
–0.5
–
–
AV
SS
– 0.3
2
Max.
7.0
7.0
125
AV
DD
+ 0.3
–
Unit
V
V
°C
V
kV
Recommended Operating Conditions
Parameter
V
DD
/AV
DDL
/V
DDL
T
A
C
LOAD
f
REF
C
LNOM
Description
Operating Voltage
Ambient Temperature
Max. Load Capacitance
Reference Frequency
Nominal Parallel Crystal Load
Capacitance for -2
Min.
3.135
0
–
–
–
Typ.
3.3
–
–
27
18
Max.
3.465
70
15
–
–
Unit
V
°C
pF
MHz
pF
Document #: 38-07711 Rev. *A
Page 2 of 6
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CY24130
DC Electrical Specifications
Parameter
[1]
I
OH
I
OL
I
IH
I
IL
V
IH
V
IL
I
VDD
I
VDDL
Name
Output High Current
Output Low Current
Input High Current
Input Low Current
Input High Voltage
Input Low Voltage
Supply Current
Supply Current
Description
V
OH
= V
DD
– 0.5, V
DD
/V
DDL
= 3.3V
V
OL
= 0.5, V
DD
/V
DDL
= 3.3V
V
IH
= V
DD
V
IL
= 0V
CMOS levels, 70% of V
DD
CMOS levels, 30% of V
DD
AV
DD
/V
DD
Current
V
DDL
Current
Min.
12
12
–
–
0.7
–
–
–
Typ.
24
24
5
–
–
–
16
14
Max.
–
–
10
10
–
0.3
–
–
Unit
mA
mA
μA
μA
V
V
mA
mA
AC Electrical Specifications
Parameter
[1]
DC
ER
EF
t
9
t
10
Name
Output Duty Cycle
Rising Edge Rate
Falling Edge Rate
Clock Jitter
PLL Lock Time
Figure 2. Test and Measurement Setup
V
DDs
0.1
μF
DUT
Outputs
C
LOAD
Description
Duty Cycle is defined in
Figure 3;
t
1
/t
2
, 50% of
V
DD
Output Clock Edge Rate, Measured from 20% to
80% of V
DD
, C
LOAD
= 15 pF. See
Figure 4.
Output Clock Edge Rate, Measured from 80% to
20% of V
DD
, C
LOAD
= 15 pF. See
Figure 4.
CLKA Peak-Peak Period Jitter
Min.
45
0.8
0.8
–
–
Typ.
50
1.4
1.4
100
–
Max.
55
–
–
–
3
Unit
%
V/ns
V/ns
ps
ms
GND
Voltage and Timing Definitions
Figure 3. Duty Cycle Definitions
t
1
t
2
V
DD
50% of V
DD
Clock
Output
0V
Note
1. Not 100% tested.
Document #: 38-07711 Rev. *A
Page 3 of 6
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CY24130
Figure 4.
t
3
ER = (0.6 x V
DD
) /t
3
, EF = (0.6 x V
DD
) /t
4
t
4
V
DD
80% of V
DD
20% of V
DD
0V
Clock
Output
Ordering Information
Ordering Code
Pb-free
CY24130ZXC-1
[2]
CY24130ZXC-1T
[2]
Package Type
16-Pin TSSOP
16-Pin TSSOP – Tape and Reel
16-Pin TSSOP
16-Pin TSSOP – Tape and Reel
16-Pin TSSOP
16-Pin TSSOP – Tape and Reel
Operating Range
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Operating Voltage
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
CY24130ZXC-2
[2]
CY24130ZXC-2T
[2]
CY24130KZXC-1
CY24130KZXC-1T
Note
2. Not recommended for new design.
Document #: 38-07711 Rev. *A
Page 4 of 6
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