74ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
September 2001
Revised February 2005
74ALVC00
Low Voltage Quad 2-Input NAND Gate
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC00 contains four 2-input NAND gates. This prod-
uct is designed for low voltage (1.65V to 3.6V) V
CC
applica-
tions with I/O compatibility up to 3.6V.
The ALVC00 is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
Features
s
1.65V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
3 ns max for 3.0V to 3.6V V
CC
3.5 ns max for 2.3V to 2.7V V
CC
4.4 ns max for 1.65V to 1.95V V
CC
s
Power-off high impedance inputs and outputs
s
Uses patented Quiet Series
¥
noise/EMI reduction
circuitry
s
Latchup conforms to JEDEC JED78
s
ESD performance:
Human body model
!
2000V
Machine model
!
250V
Ordering Code:
Order Number
74ALVC00M
74ALVC00MTC
Package Number
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
Quiet Series
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500626
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74ALVC00
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Voltage (V
I
)
Output Voltage (V
O
) (Note 2)
DC Input Diode Current (I
IK
)
V
I
0V
DC Output Diode Current (I
OK
)
V
O
0V
DC Output Source/Sink Current
(I
OH
/I
OL
)
DC V
CC
or GND Current per
Supply Pin (I
CC
or GND)
Storage Temperature Range (T
STG
)
0.5V to
4.6V
0.5V to 4.6V
0.5V to V
CC
0.5V
50 mA
50 mA
r
50 mA
r
100 mA
65
q
C to
150
q
C
Recommended Operating
Conditions
(Note 3)
Power Supply
Operating
Input Voltage (V
I
)
Output Voltage (V
O
)
Free Air Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
t/
'
V)
V
IN
0.8V to 2.0V, V
CC
3.0V
5 ns/V
Note 1:
The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The “Recommended Operating Conditions” table will define the condi-
tions for actual device operation.
Note 2:
I
O
Absolute Maximum Rating must be observed, limited to 4.6V.
Note 3:
Floating or unused control inputs must be held HIGH or LOW.
1.65V to 3.6V
0V to V
CC
0V to V
CC
40
q
C to
85
q
C
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level Input Voltage
Conditions
V
CC
(V)
1.65 - 1.95
2.3 - 2.7
2.7 - 3.6
V
IL
LOW Level Input Voltage
1.65 - 1.95
2.3 - 2.7
2.7 - 3.6
V
OH
HIGH Level Output Voltage
I
OH
I
OH
I
OH
I
OH
Min
0.65 x V
CC
1.7
2.0
0.35 x V
CC
0.7
0.8
V
CC
- 0.2
1.2
2.0
1.7
2.2
2.4
2
0.2
0.45
0.4
0.7
0.4
V
V
V
V
Max
Units
100
P
A
4 mA
6 mA
12 mA
1.65 - 3.6
1.65
2.3
2.3
2.7
3.0
I
OH
V
OL
LOW Level Output Voltage
I
OL
I
OL
I
OL
I
OL
I
OL
I
I
I
CC
Input Leakage Current
Quiescent Supply Current
Increase in I
CC
per Input
V
I
V
IH
24 mA
100
P
A
4 mA
6 mA
12 mA
24 mA
V
CC
or GND, I
O
V
CC
0.6V
0
3.0
1.65 - 3.6
1.65
2.3
2.3
2.7
3.0
3.6
3.6
3 - 3.6
0
d
V
I
d
3.6V
r
5.0
10
750
P
A
P
A
P
A
'
I
CC
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2
74ALVC00
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
Min
t
PHL
, t
PLH
Propagation Delay
1.0
C
L
3.3V
r
0.3V
Max
3.0
50 pF
V
CC
Min
2.7V
Max
3.5
V
CC
Min
1.0
40
q
C to
85
q
C, R
L
500
:
C
L
2.5V
r
0.2V
Max
3
30 pF
V
CC
Min
1.0
1.8V
r
0.15V
Max
4.4
ns
Units
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
V
I
f
0V or V
CC
10 MHz, C
L
50 pF
Conditions
T
A
V
CC
3.3
3.3
2.5
1.8
25
q
C
Typical
4.5
23
21
20
Units
pF
pF
AC Loading and Waveforms
TABLE 1. Values for Figure 1
TEST
t
PLH
, t
PHL
SWITCH
Open
FIGURE 1. AC Test Circuit
TABLE 2. Variable Matrix
(Input Characteristics: f 1MHz; t
r
t
f
2ns; Z
0
Symbol
V
mi
V
mo
V
CC
3.3V
r
0.3V
1.5V
1.5V
2.7V
1.5V
1.5V
2.5V
r
0.2V
V
CC
/2
V
CC
/2
1.8V
r
0.15V
V
CC
/2
V
CC
/2
50
:
FIGURE 2. Waveform for Inverting and Non-inverting Functions
3
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74ALVC00
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
www.fairchildsemi.com
4
74ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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