Si9123
Vishay Siliconix
500-kHz Half-Bridge DC-DC Converter With
Integrated Secondary Synchronous Rectification Control
FEATURES
D
12-V to 72-V Input Voltage Range
D
Compatible with ETSI 300 132-2 100 V, 100-ms
Transients
D
Integrated Half-Bridge 1-A Primary Drivers
D
Secondary Synchronous Rectifier Control
D
Voltage Mode Control
D
Voltage Feedforward Compensation
D
High Voltage Pre-Regulator Operates During Start-Up
D
Current Sensing On Low-Side Primary Device
D
D
D
D
D
Hiccup Current Control During Shorted Load
Low Input Voltage Detection
Programmable Soft-Start Function
Programmable Oscillator Frequency
Over Temperature Protection
APPLICATIONS
D
Network Cards
D
Power Supply Modules
DESCRIPTION
Si9123 is a dedicated half-bridge controller IC ideally suited to
fixed telecom dc-dc converter applications where high
efficiency is required at low output voltages (e.g. <3.3 V).
Designed to operate within the voltage range of 12-72 V and
withstand 100 V, 100 ms transients, the IC is capable of
controlling and directly driving both primary side MOSFET
switches of a half-bridge circuit.
High conversion efficiency is achieved by use of synchronous
rectifying MOSFET transistors in the secondary. Due to the
very low on-resistance of the secondary MOSFETs, a
significant increase in the efficiency can be achieved as
compared with conventional Schottky diodes for today’s low
output voltages. On-chip control of the dead time delays
between the primary and secondary signals keep efficiencies
high and prevents accidental destruction of the power
transformer or wasted energy from self timed approaches.
Such a system can achieve conversion efficiencies well in
excess of 90%.
FUNCTIONAL BLOCK DIAGRAM
V
INEXT
R
EXT
V
IN
D
1
BST
V
CC
CV
CC
EP
Voltage
Information
SS
C
SS
CS2
CS1
Half-Bridge
Synchronous
Controller
Opto
Error
Amp
1.215 V
Voltage
Control
Soft-
Start
Current
Control
PWM
Primary
Drivers
D
L
(Low)
R
S
Secondary
Drivers
SEC_SYNC
Pulse
Transformer
Driver
Logic
C
LOAD
R
LOAD
Pre-Reg
C
BOOST
L
X
D
H
(High)
V
OUT
+
C
VIN1
−
Power
Transformer
To
V
CC
Si9123
Figure 1.
Document Number: 72098
S-40692—Rev. C, 19-Apr-04
www.vishay.com
1
Si9123
Vishay Siliconix
DESCRIPTION (CONTINUED)
Si9123 has advanced current monitoring circuitry to permit the
user to set the maximum current in the primary circuit. Such a
feature acts as protection against output shorts. Upon sensing
an overload condition, the converter is shut off for a period of
time and then soft-start cycle is re-initiated, achieving hiccup
mode operation. Current sensing is by means of a sense
resistor on the low-side primary device. An integrated
over−temperature shutdown circuit also protects the system.
series resistor during startup. The pre-regulator automatically
disconnects from the input supply when the output voltage is
established by means of a feedback winding from the filter
inductor.
Si9123 is available in
TSSOP-16
pin package. In order to
satisfy the stringent ambient temperature requirements,
Si9123 is rated to handle the industrial temperature range of
–40 to 85_C.
Si9123 is available in lead free.
The 100-V depletion mode MOSFET integrated pre-regulator
circuit permits direct operation from input voltage with only one
DETAILED BLOCK DIAGRAM
V
IN
V
CC
V
REF
R
OSC
Pre-Regulator
+
−
V
UVLO
8.8 V
Level
Shift
V
FF
OSC
Ramp
BST
D
H
High-Side
Driver
L
X
V
INDET
V
REF
Error Amplifier
2.2 R
R
EP
−
+
V
CC
1.65 V
SS
Gain
CS2
CS1
+
−
Peak DET
I
+
−
+
−
V
UV
V
SD
550 mV
+
−
4I
PWM
Comparator
V
CC
D
L
Low-Side
Driver
Driver
Control
and
Timing
Hiccup
Mode Start
OTP
V
CC
SEC_SYNC
SEC_SYNC
Driver
PGND
Over Current Protection
GND
Si9123
Figure 2.
www.vishay.com
2
Document Number: 72098
S-40692—Rev. C, 19-Apr-04
Si9123
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS (ALL VOLTAGES REFERENCED TO GND = 0 V)
V
IN
(Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 V
V
IN
(100 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14.5 V
V
BST
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 V
V
LX
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 V
V
BST
−
V
LX
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
V
REF
, R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
SEC_SYNC Drive Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . . 5 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−65
to 150_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C
Power Dissipation
a
TSSOP-16 (T
A
= 25_C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.25 W
Thermal Impedance (Q
JA
)
TSSOP-16
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100_C/W
Notes
a. Device mounted on JEDEC compliant 1S2P (4-layer) test board..
b. Derate
−10
mW/_C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE (ALL VOLTAGES REFERENCED TO GND = 0 V)
V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 to 72 V
C
VIN1
ø
CVIN2
. . . . . . . . . . . . . . . . . . . . . . . 100
mF/ESR
v
100 mW and 0.1
mF
V
CC
Operating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 to 13.2 V
CV
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.7
mF
f
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 to 600 kHz
R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 to 72 kW
R
EXT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 kW
C
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 nF
C
REF
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0
mF
C
BOOST
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1
mF
C
LOAD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
mF
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
−0.
3 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
Reference Voltage Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 2.5 mA
SPECIFICATIONS
a
Test Conditions Unless Specified
Parameter
Reference (3.3 V)
Output Voltage
Short Circuit Current
Load Regulation
Power Supply Rejection
V
REF
I
SREF
dVr/dlr
PSRR
V
CC
= 12 V, 25_C Load = 0 mA
V
REF
= 0 V
I
REF
= 0 to
−2.5
mA
@ 100Hz
−30
60
3.2
3.3
3.4
−50
−75
V
mA
mV
dB
Limits
−40
to 85_C
Symbol
CS1 = CS2 = 0 V, f
NOM
= 500 kHz, V
IN
= 48 V
V
INDET
= 4.8 V; 10 V
v
V
CC
v
13.2 V
Min
b
Typ
c
Max
b
Unit
Oscillator
Accuracy (1% R
OSC
)
Max Frequency
F
MAX
R
OSC
= 30 kW, f
NOM
= 500 kHz
R
OSC
= 24 kW
−20
600
20
%
kHz
Error Amplifier
Input Bias Current
Gain
Bandwidth
Power Supply Rejection
Slew Rate
I
BIAS
A
V
BW
PSRR
SR
@ 100Hz
V
EP
= 0 V
−40
−2.2
5
60
0.5
MHz
dB
V/ms
−15
mA
Current Sense Amplifier
Input Voltage CM Range
Input Amplifier Gain
Input Amplifier Bandwidth
Input Amplifier Offset Voltage
V
CC
Hiccup Threshold
Hysteresis
Document Number: 72098
S-40692—Rev. C, 19-Apr-04
V
CM
A
VOL
BW
V
OS
V
THCUP
Increase CS2 Until SS Hiccups
Decrease CS2 Until SS Clamps
V
CS1
−
GND, V
CS2
−
GND
"150
17.5
5
"5
150
−50
www.vishay.com
mV
mV
dB
MHz
3
Si9123
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions Unless Specified
Parameter
PWM Operation
Duty Cycle
e
D
MAX
D
MIN
f
OSC
= 500 kHz
V
EP
= 0 V
V
EP
= 1.85 V
90
92
t15
95
%
Limits
−40
to 85_C
Symbol
CS1 = CS2 = 0 V, f
NOM
= 500 kHz, V
IN
= 48 V
V
INDET
= 4.8 V; 10 V
v
V
CC
v
13.2 V
Min
b
Typ
c
Max
b
Unit
Pre-Regulator
Input Voltage (Continuous)
Input Leakage Current
Regulator Bias Current
Pre-Regulator Drive Capacility
V
CC
P R
Pre-Regulator T
l t Turn Off
Threshold Voltage
Undervoltage
Lockout
d
V
IN
I
LKG
I
REG1
I
REG2
I
START
V
REG1
V
REG2
V
UVLO
V
UVLOHYS
I
IN
= 10
mA
V
IN
= 72 V, V
CC
u
V
REG
V
IN
= 72 V, V
INDET
t
V
SD
V
IN
= 72 V, V
INDET
u
V
REF
V
CC
t
V
REG
V
INDET
u
V
REF
V
INDET
= 0 V
V
CC
Rising
7.15
T
A
= 25_C
8.1
T
A
= 25_C
20
7.4
8.5
9.1
9.1
9.2
8.6
8.6
0.5
9.8
9.3
10.4
9.7
V
86
4
72
10
200
6.5
V
mA
mA
V
UVLO
Hysteresis
Soft-Start
Soft-Start Current Output
Soft-Start Completion Voltage
I
SS1
I
SS2
V
SS_COMP
0
t
V
SS
t
2 V
be
2 V
be
t
V
SS
t
4.8 V
Normal Operation
12
60
7.35
20
100
8.1
28
200
8.85
mA
V
Shutdown
V
INDET
Shutdown FN
V
INDET
Hysteresis
V
SD
V
INDET
Rising
V
INDET
350
550
200
720
mV
V
INDET
Input Threshold Voltages
V
INDET
−
V
IN
Under Voltage
V
INDET
Hysteresis
V
UV
V
INDET
Rising
V
INDET
3.13
3.3
0.3
3.46
V
Over Temperature Protection
Activating Temperature
De-Activating Temperature
T
J
Increasing
T
J
Decreasing
160
130
_C
Converter Supply Current (V
CC
)
Shutdown
Switching Disabled
Switching w/o Load
Switching with C
LOAD
V
CC
Hiccup Current
I
CC1
I
CC2
I
CC3
I
CC4
I
HCUP
Shutdown, V
INDET
= 0 V
V
INDET
t
V
REF
V
INDET
u
V
REF
, f
NOM
= 500 kHz
V
CC
= 12 V, C
DH
= C
DL
= 3 nF, C
SEC_SYNC
= 0.3 nF
CS2
−
CS1 = 200 mV, C
DL
= C
DH
= 3 nF
C
SEC_SYNC
= 0.3 nF
50
1.8
3.0
140
2.8
4.4
15.2
4.3
350
3.8
6.8
mA
mA
www.vishay.com
4
Document Number: 72098
S-40692—Rev. C, 19-Apr-04
Si9123
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions Unless Specified
Parameter
Symbol
CS1 = CS2 = 0 V, f
NOM
= 500 kHz, V
IN
= 48 V
V
INDET
= 4.8 V; 10 V
v
V
CC
v
13.2 V
Limits
−40
to 85_C
Min
b
V
BST
−
0.3
Typ
c
Max
b
Unit
Output MOSFET DH Driver (High-Side)
Output High Voltage
Output Low Voltage
Boost Current
L
X
Current
Peak Output Source
Peak Output Sink
Rise Time
Fall Time
V
OH
V
OL
I
BST
I
LX
I
SOURCE
I
SINK
t
r
t
f
Sourcing 10 mA
Sinking 10 mA
V
LX
= 48 V, V
BST
= V
LX
+ V
CC
V
V
LX
= 48 V, V
BST
= V
LX
+ V
CC
V
T
A
= 25_C C
DH
= 3 nF, V
CC
= 12 V, 20
−
80%
25_C,
nF
V
0.8
−0.8
0.75
1.55
−0.4
−1.0
1.0
18
22
28
28
V
V
LX
+
0.3
2.4
−0.1
−0.75
mA
A
ns
Output MOSFET DL Driver (Low-Side)
Output High Voltage
Output Low Voltage
Peak Output Source
Peak Output Sink
Rise Time
Fall Time
V
OH
V
OL
I
SOURCE
I
SINK
t
r
t
f
Sourcing 10 mA
Sinking 10 mA
V
CC
= 12 V
T
A
= 25_C C
DL
= 3 nF, V
CC
= 12 V, 20
−
80%
25_C,
nF
V
−1.0
0.75
1.0
19
24
28
28
V
CC
−
0.3
0.3
−0.75
A
ns
V
Secondary_Synchronous Driver
Output High Voltage
Output Low Voltage
Leading Edge Delays
Trailing Edge Delays
Peak Output Source
Peak Output Sink
Rise Time
Fall Time
V
OH
V
OL
t
d1
t
d3
t
d2
t
d4
I
SOURCE
I
SINK
t
r
t
f
V
CC
= 12 V
T
A
= 25_C C
SEC SYNC
= 3 nF, V
CC
= 12 V, 20
−
80%
25_C,
SEC_SYNC
nF
V
T
A
= 25_C, V
CC
= 12 V, L
X
= 48 V, See
Figure 3
,
,
,
g
C
DH
= C
DL
= 3 nF, C
SGC_SYNC
= 0.3 nF
,
Sourcing 10 mA
Sinking 10 mA
90
75
90
65
−100
100
16
17
28
28
V
CC
−
0.4
0.4
110
95
110
95
mA
ns
ns
V
Voltage Mode
Error Amplifier
t
d1DH
t
d2DL
Input to high-side switch off
Input to low-side switch off
t200
t200
ns
Current Mode
Current Amplifier
t
d3DH
t
d4DL
Input to high-side switch off
Input to low-side switch off
t200
t200
ns
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (−40_ to 85_C).
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at V
CC
= 12 V unless otherwise noted.
d. V
UVLO
tracks V
REG1
by a diode drop
e. Measured on D
L
or D
H
outputs.
Document Number: 72098
S-40692—Rev. C, 19-Apr-04
www.vishay.com
5
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