NCP370
Positive and Negative
Overvoltage Protection
with Internal Low R
ON
N-MOSFETs and Reverse
Charge Control Pin
The NCP370 is an overvoltage, overcurrent and reverse control
device. Two main modes are available by setting logic pins. First mode
is Direct Mode from Wall−Adapter to the system. In this mode the
system is both positive and negative over−voltage protected up to
+28 V and down to
−28
V. The wall adapter (or AC/DC charger) is
disconnected from the system if the input voltage exceeds the
overvoltage (OVLO) or undervoltage (UVLO) thresholds. At power
up, the V
out
turns on 30 ms after the V
in
exceeds the undervoltage
threshold.
The second mode (see Tables 1 & 2), called the Reverse Mode,
allows an external accessory to be powered by the system battery or
boost converter. Here the external accessory would be connected to
the device input (bottom connector of system) and the device battery
would be at the device output. In this case overcurrent protection is
activated to prevent accessory faults and battery discharge. Thanks to
the NCP370 using an internal NMOS, the system cost and the PCB
area of the application board are minimized.
The NCP370 provides a negative going flag (FLAG) output which
alerts the system that a fault has occurred.
In addition, the device has ESD−protected input (15 kV Air) when
bypassed with a 1
mF
or larger capacitor.
Features
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MARKING
DIAGRAM
1
12 PIN LLGA
MU SUFFIX
CASE 513AK
NCAI
370
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
IN
IN
GND
RES
RES
RES
1
2
3
4
5
6
12
11
10
9
8
7
NC
OUT
FLAG
DIR
REV
Ilim
NCP370
•
•
•
•
•
•
•
•
•
•
•
•
Overvoltage Protection Up to 28 V
Negative Voltage Protection Down to
−28
V
Reverse Charge Control: REV
Direct Charge Control: DIR
Overcurrent Protection
Thermal Shutdown
On−chip Low R
DS(on)
NMOS Transistors: Typical 130 mW
Overvoltage Lockout (OVLO)
Undervoltage Lockout (UVLO)
Soft−Start
Alert FLAG Output
Compliance to IEC61000−4−2 (Level 4)
8 kV (Contact)
15 kV (Air)
•
ESD Ratings: Machine Model = B
Human Body Model = 2
•
12 Lead TLLGA 3x3 mm Package
•
This is a Pb−Free Device
(Top View)
ORDERING INFORMATION
Device
NCP370MUAITXG
Package
LLGA12
(Pb−Free)
Shipping
†
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Typical Applications
•
•
•
•
•
Cell Phones
Camera Phones
Digital Still Cameras
Personal Digital Applications
MP3 Players
©
Semiconductor Components Industries, LLC, 2011
July, 2011
−
Rev. 6
1
Publication Order Number:
NCP370/D
NCP370
10k
Charger
Wall Adapter
1mF
1
2
3
4
5
6
12
IN
NC 11
IN
OUT 10
GND FLAG 9
RES
DIR 8
RES
REV 7
Ilim
RES
R
limit
NCP370
FLAG
DIR
REV
4.7mF
System
FLAG
DIR
REV
LI+BATTERY
GND
Figure 1. Typical Application Circuit
FUNCTIONAL BLOCK DIAGRAM
INPUT
OUTPUT
Gate Driver and Reverse OCP
Logic
REV
I
lim
VREF
Charge
Pump
EN
Block
UVLO
OVLO
Control
Logic
and
Timer
FLAG
Thermal
Shutdown
DIR
Figure 2. Functional Block Diagram
GND
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2
NCP370
PIN FUNCTION DESCRIPTION
Pin
1, 2
Name
IN
Type
POWER
Description
Input voltage pins. These pins are connected to the power supply. A 1
mF
low ESR ceramic capacitor, or
larger, must be connected between these pins and GND. The two IN pins must be hardwired to common
supply.
Main Ground
Reserved pin. This pin must be connected to GND.
Reserved pin. This pin must be connected to GND.
Reserved pin. This pin must be connected to GND.
Current Limit Pin. This pin provides the reference, based on the internal band−gap voltage reference, to
limit the over current, across internal N−MOSFETs, from battery to external accessory. A 1% tolerance,
or better, resistor shall be used to get the highest accuracy of the overcurrent limit.
Reverse Charge Control Pin. In combination with DIR, the internal N−MOSFETs are turned on if Battery
is applied on the OUT pin (See Tables 1 & 2). In reverse mode, the internal overcurrent protection is
activated. When reverse mode is disabled, the NCP370 current consumption, into OUT pin, is drastically
decreased to limit battery discharge.
Direct Mode Pin. In combination with REV, the internal N−MOSFETs are turned on if a wall adapter
AC−DC is applied on the IN pins (See Tables 1 & 2). The device enters in shutdown mode when this pin
is tied to a high level and the REV pin is tied to high. In this case the output is disconnected from input.
The state of this pin does not have an impact on the fault detect of the FLAG pin.
Fault Indication Pin. This pin allows an external system to detect fault condition. The pin goes low when
input voltage exceeds OVLO threshold or drops below UVLO threshold, charge current from battery to
accessory exceeds current limit or internal temperature exceeds thermal shutdown limit. Since the pin is
open drain functionality, an external pull up resistor to VBat must be added (10 kW minimum value).
Output Voltage Pin. This pin follows IN pins when “no input fault” is detected. The output is disconnected
from the V
IN
power supply when the input voltage is under the UVLO threshold or above OVLO threshold
or thermal shutdown limit is exceeded.In Reverse Mode, the device is supplied across OUT pin.
Not Connected
The PAD1 is used to dissipate the internal MOSFET thermal energy and must be soldered to an isolated
PCB area. The area mustn’t be connected to any other potential than complete isolated one. See PCB
recommendations on page 9.
3
4
5
6
7
GND
RES
RES
RES
Ilim
POWER
INPUT
INPUT
INPUT
OUTPUT
8
REV
INPUT
9
DIR
INPUT
10
FLAG
OUTPUT
11
OUT
OUTPUT
12
13
NC
PAD1
NC
POWER
MAXIMUM RATINGS
Rating
Minimum Voltage (IN to GND)
Minimum Voltage (All others to GND)
Maximum Voltage (IN to GND)
Maximum Voltage (OUT to GND)
Maximum Voltage (All others to GND)
Thermal Resistance, Junction−to−Air, (Note 1)
Operating Ambient Temperature Range
Storage Temperature Range
Junction Operating Temperature
ESD Withstand Voltage (IEC 61000−4−2)
Human Body Model (HBM), Model = 2, (Note 2)
Machine Model (MM) Model = B, (Note 3)
Moisture Sensitivity
Symbol
Vmin
in
Vmin
Vmax
in
Vmax
out
Vmax
R
qJA
T
A
T
STG
T
J
Vesd
Value
−30
−0.3
30
10
7
200
−40
to +85
−65
to +150
150
15kV air, 8kV contact
2000V
200V
Level 1
Unit
V
V
V
V
V
°C/W
°C
°C
°C
kV
V
V
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The R
qJA
is highly dependent on the PCB heat sink area (connected to PAD1). See PCB recommendation paragraph.
2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114.
3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
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3
NCP370
ELECTRICAL CHARACTERISTICS
(V
in
= 5 V, Minimum/Maximum limits at
−40°C
< T
A
< +85°C unless otherwise noted. Typical
values are at T
A
= +25°C)
Characteristics
Input Voltage Range
Input Voltage
Output Voltage Range
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
Over voltage Lockout Threshold
NCP370MUAITXG
Overvoltage Lockout Hysteresis
Over System Voltage Lockout
Overvoltage Lockout Hysteresis
V
in
to V
out
Resistance
Symbols
V
in
Vin
min
V
out
UVLO
UVLO
hyst
OVLO
OVLO
hyst
OVLO
00
OVLO
00hyst
R
DS(on)
Conditions
Disable, Direct and Enhance Modes, V
out
= 0 V
Disable, Direct and Enhance Modes, V
out
= 4.25V
Reverse Mode
Vin falls below UVLO Threshold
(Disable, Direct and Enhance Modes)
V
in
rises above UVLO Threshold + UVLO
hyst
V
in
rises above OVLO threshold
(Disable and Direct Modes)
V
in
falls below to OVLO
−
OVLO
hyst
V
in
rises above OVLO
00
Threshold Enhanced
Mode @ 25°C
V
in
falls below to OVLO
00
−
OVLO
00hyst
@ 25°C
V
in
= 5 V, Direct Mode, Load Connected to V
out
V
in
= 5 V, Direct Mode,
Load Connected to V
out
@ 25°C
V
out
= 5 V, Reverse Mode, Accessory
Connected to V
in
V
out
= 5 V, Reverse Mode, Accessory
Connected to V
in
@ 25°C
No Load. Disable Mode, V
in
connected
No Load. Direct Mode
Rin = 10 kW, V
out
= 5.5 V, Disable Mode
No Accessory, V
out
= 4.2 V, Reverse Mode
Output Load, V
in
= 5.5 V, Direct
Accessory, V
out
= 5.5 V, Reverse Modes
V
out
= 4.2 V, Load on V
in
, Reverse Mode, R
ILIM
= 0
W,
1 A/1
ms
Direct Accessory Short, Reverse Mode,
V
out
= 4.2 V, I
lim
= 1.6 A
1.2 V < V
in
< UVLO
Sink 50
mA
on FLAG Pin
V
in
> OVLO, Sink 1 mA on FLAG Pin
I
reverse
> I
lim
, Sink 1 mA on FLAG Pin
FLAG Leakage Current
DIR Voltage High
DIR Voltage Low
DIR Leakage Current
REV Voltage High
REV Voltage Low
REV Leakage Current
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
FLAG
leak
V
ihDIR
V
ilDIR
DIR
leak
V
ihREV
V
ilREV
REV
leak
T
SD
T
SDHYST
V
in
or V
out
connected
V
in
and V
out
disconnected
200
1.0
150
30
V
in
or V
out
connected
V
in
and V
out
disconnected
1.2
0.55
200
1.0
FLAG Level = 5.5 V
1.2
0.55
1.0
1.3
1.3
1.35
1.75
7.0
30
400
400
400
nA
V
V
nA
V
V
nA
°C
°C
2.10
A
%
mV
Min
−28
−24
2.5
2.6
45
6.3
60
7.9
80
2.7
60
6.6
80
8.27
100
130
130
130
130
140
200
0.02
200
5.5
2.8
75
6.9
100
8.6
145
220
200
220
200
200
280
1.0
315
mA
mA
mA
mA
A
mW
Typ
Max
28
Unit
V
V
V
V
mV
V
mV
V
mV
mW
V
out
to V
in
Resistance
R
DS(on)
Input Standby Current
Input Supply Quiescent Current
Output Standby Current
Reverse Mode current
Minimum DC Current
Idd
STD
Idd
IN
Idd
STDOUT
Idd
REV
I
CHG
I
REV
I
OCP
I
acc
Vol
flag
Overcurrent Threshold
Overcurrent Response
FLAG Output Low Voltage
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4
NCP370
Characteristics
Symbols
Conditions
Min
Typ
Max
Unit
TIMINGS
DIRECT MODE
Start Up Delay
FLAG Going Up Delay
Turn Off Delay
Alert Delay
Disable Time
REVERSE MODE
Reverse Start Up Delay
Reverse FLAG Going Up Delay
Rearming Reverse Delay
Over Current Regulation Time
OCP Delay Time
Reverse Disable Time
NOTE:
ton
REV
tstart
REV
t
RRD
t
REG
t
OCP
t
REVDIS
V
out
w
2.5 V, From REV = 1.2 to 0.55 to
V
in
w
0.3 V, Reverse Mode
From V
in
w
0.3 V FLAG = 1.2 V, Reverse Mode
V
out
> 2.5 V, R
in
= 1
W,
Reverse Mode
V
out
> 2.6, V
in
> 0.3 V, Reverse Mode
From I
reverse
> I
lim
, 1 A/1
ms
From REV = 0.55 V to 1.2 V, to V
in
< 0.3 V.
V
out
= 5 V
0.6
0.6
20
0.5
1.2
1.2
30
1.2
5
200
1.8
1.8
40
1.8
ms
ms
ms
ms
ms
ms
t
on
t
start
t
off
t
stop
t
dis
From V
in
> UVLO to V
out
w
0.3 V
From V
out
> 0.3 V to FLAG = 1.2 V
From V
in
> OVLO to V
out
v
0.3 V
V
in
Increasing from 5 V to 8 V at 3 V/ms
From V
in
> OVLO to FLAG
v
0.4 V See Figure
3 and 9 V
in
Increasing from 5 V to 8 V at 3 V/ms
REV = 1.2 V, From DIR = 0.4 V to 1.2 V to V
out
v
0.3 V
20
20
30
30
1.5
1.5
2.5
40
40
5.0
ms
ms
ms
ms
ms
Electrical parameters are guaranteed by correlation across the full range of temperature.
TYPICAL OPERATING CHARACTERISTICS
Operation
Overvoltage Lockout (OVLO)
The NCP370 provides overvoltage protection for positive
and negative voltages, up to 28 V or down to
−28
V on
IN pins. At powerup, with DIR pin = low, REV = high, the
output rises 30 ms after the input rises above the UVLO. The
NCP370 provides a FLAG output, which alerts the system
that a fault has occurred. The FLAG signal rises 30 ms after
the output signal rises.
A Reverse Mode is available when an accessory is
connected on IN pins and the internal battery is applied on
the OUT pin, allowing the accessory to be powered. In this
mode, no supply must be connected on IN pins and REV pin
must be tied to low level. The NCP370 provides overcurrent
protection for the battery from current faults in the
accessory.
Undervoltage Lockout (UVLO)
To protect connected systems on Vout pin from
overvoltage, the device has a built−in overvoltage lock out
(OVLO) circuit. During overvoltage condition, the output is
disabled as long as the input voltage exceeds OVLO.
Additional OVLO thresholds can be manufactured
(Please contact your ON Semiconductor representative for
availability).
FLAG output will be low since V
in
is higher than OVLO.
This circuit has a 80 mV hysteresis to provide noise
immunity to transient conditions.
Oversystem Voltage Lockout (OVLO
00
)
To ensure proper turn−on operation from AC/DC (or Wall
adapter charging) under any conditions, the device has a
built−in undervoltage lock out (UVLO) circuit. During
positive going slope on V
in
, the output remains disconnected
from input until V
in
voltage is above UVLO. The FLAG
output will be low as long as V
in
has not reached UVLO
threshold. This circuit has a 60 mV hysteresis to provide
noise immunity to transient conditions.
In Reverse Mode (REV pin
v
0.55 V, DIR
w
1.2 V),
UVLO and OVLO comparators are inactivated.
A second overvoltage comparator is available for
supplying the sytem (output) by the Wall Adaptor (input) by
setting DIR = low and REV = low. The R
DS(on)
will be
higher during this mode allowing to handle few 10 mA
.
This additional comparator allows to put higher input
voltage (OVLO = 8.27 V typical) on the NCP370 during test
production sequence (I.E: One Time Programming of the
cell phone, PDA). This parameter is 25°C guaranteed only.
FLAG Output
The NCP370 provides a FLAG output which alerts that a
fault has occurred. As soon as a fault state is detected by the
NCP370 (see Figure 3), the FLAG pin output goes low,
alerting the micro−controller to take appropriate action.
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