DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD784214,784215,784216
16/8-BIT SINGLE-CHIP MICROCONTROLLERS
The
µ
PD784216 is a member of the
µ
PD784216 Subseries of the 78K/IV Series. Besides a high-speed and high-
performance CPU, it features various peripheral hardware such as ROM, RAM, I/O ports, 8-bit resolution A/D and
D/A converters, timer, serial interface, real-time output port, interrupts, etc.
A flash memory version, the
µ
PD78F4216, which can operate in the same voltage range as the mask ROM
version, and various development tools are under development.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
µ
PD784216, 784216Y Subseries User’s Manual Hardware: U12015E
78K/IV Series User’s Manual Instructions:
U10905E
FEATURES
• 78K/IV series
• Inherits peripheral functions of
µ
PD78078 subseries
• Pin-compatible with
µ
PD784216Y subseries
• Minimum instruction execution time
160 ns
(@ f
XX
= 12.5-MHz operation with main system clock)
61
µ
s
(@ f
TX
= 32.768-kHz operation with subsystem clock)
• I/O port: 86 pins
• Timer/counter: 16-bit timer/counter
×
1 unit
8-bit timer/counter
×
6 units
• Serial interface: 3 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O): 1 channel
• Standby function
HALT/STOP/IDLE mode
In power-saving mode: HALT/IDLE mode (with
subsystem clock)
• Clock division function
• Watch timer: 1 channel
• Watchdog timer: 1 channel
• Clock output function
f
XX
, f
XX
/2, f
XX
/2
2
, f
XX
/2
3
, f
XX
/2
4
, f
XX
/2
5
, f
XX
/2
6
, f
XX
/2
7
,
f
XT
selectable
• Buzzer output function
f
XX
/2
10
, f
XX
/2
11
, f
XX
/2
12
, f
XX
/2
13
selectable
• A/D converter: 8-bit resolution
×
8 channels
• D/A converter: 8-bit resolution
×
2 channels
• Supply voltage: V
DD
= 2.2 to 5.5 V
APPLICATIONS
Cellular phones, PHS, cordless telephones, CD-ROM, AV equipment
Unless mentioned otherwise, references in this document to the
µ
PD784216 refer to the
µ
PD784214,
µ
PD784215, and
µ
PD784216.
The information in this document is subject to change without notice.
Document No. U11813EJ1V0DS00 (1st edition)
Date Published January 1999 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1996
µ
PD784214,784215,784216
ORDERING INFORMATION
Part Number
Package
Internal ROM (Bytes) Internal RAM (Bytes)
µ
PD784214GC-×××-8EU
µ
PD784214GF-×××-3BA
µ
PD784215GC-×××-8EU
µ
PD784215GF-×××-3BA
µ
PD784216GC-×××-8EU
µ
PD784216GF-×××-3BA
100-pin plastic LQFP (fine pitch) (14
×
14 mm)
100-pin plastic QFP (14
×
20 mm)
100-pin plastic QFP (14
×
20 mm)
100-pin plastic QFP (14
×
20 mm)
96 K
96 K
128 K
128 K
3584
3584
5120
5120
8192
8192
100-pin plastic LQFP (fine pitch) (14
×
14 mm) 128 K
100-pin plastic LQFP (fine pitch) (14
×
14 mm) 128 K
Remark
×××
indicates ROM code suffix.
78K/IV SERIES LINEUP
: Under mass production
: Under development
I
2
C bus supported
Multi-master I
2
C bus supported
µ
PD784038Y
µ
PD784038
µ
PD784225Y
µ
PD784225
80-pin, ROM correction added
Multi-master I
2
C bus supported
Standard models
µ
PD784026
Enhanced
A/D converter,
16-bit timer, and
power management
Enhanced internal memory capacity
Pin-compatible with the
µ
PD784026
Multi-master I
2
C bus supported
µ
PD784216Y
µ
PD784216
100-pin, enhanced I/O and
internal memory capacity
µ
PD784218Y
µ
PD784218
Enhanced internal memory
capacity, ROM correction added
µ
PD784054
µ
PD784046
ASSP models
µ
PD784955
For D/A inverter control
On-chip 10-bit A/D converter
µ
PD784937
Enhanced functions of the
µ
PD784908, enhanced
internal memory capacity,
ROM correction added.
Multi-master I
2
C bus supported
µ
PD784908
On-chip IEBus
TM
controller
µ
PD784928Y
µ
PD784915
Software servo control
On-chip analog circuit for VCRs
Enhanced timer
µ
PD784928
Enhanced functions
of the
µ
PD784915
2
µ
PD784214,784215,784216
FUNCTIONS (1/2)
Part Number
Item
Number of basic instructions
(mnemonics)
General-purpose register
Minimum instruction execution
time
Internal
memory
Memory space
I/O port
Total
CMOS input
CMOS I/O
N-ch open drain I/O
Pins with
ancillary
Pins with pull-up
resistor
ROM
RAM
113
8 bits
×
16 registers
×
8 banks, or 16 bits
×
8 registers
×
8 banks (memory mapping)
• 160 ns/320 ns/640 ns/1280 ns/2560 ns (@ f
XX
= 12.5-MHz operation with main system clock)
• 61
µ
s (@ f
XT
= 32.768-kHz operation with subsystem clock)
96 KBytes
3584 Bytes
128 KBytes
5120 Bytes
8192 Bytes
µ
PD784214
µ
PD784215
µ
PD784216
1 MBytes with program and data spaces combined
86
8
72
6
70
22
6
4 bits
×
2, or 8 bits
×
1
Timer/counter:
(16-bit)
Timer register
×
1
Capture/compare register
×
2
Pulse output
• PPG output
• Square wave output
• One-shot pulse output
Pulse output
• PWM output
• Square wave output
Pulse output
• PWM output
• Square wave output
Pulse output
• PWM output
• Square wave output
Pulse output
• PWM output
• Square wave output
Pulse output
• PWM output
• Square wave output
Pulse output
• PWM output
• Square wave output
functions
Note
LED direct
drive output
Middle-
voltage pin
Real-time output port
Timer/counter
Timer/counter 1: Timer register
×
1
(8-bit)
Compare register
×
1
Timer/counter 2: Timer register
×
1
(8-bit)
Compare register
×
1
Timer/counter 5: Timer register
×
1
(8-bit)
Compare register
×
1
Timer/counter 6: Timer register
×
1
(8-bit)
Compare register
×
1
Timer/counter 7: Timer register
×
1
(8-bit)
Compare register
×
1
Timer/counter 8 : Timer register
×
1
(8-bit)
Compare register
×
1
Serial interface
A/D converter
D/A converter
• UART/IOE (3-wire serial I/O): 2 channels (on-chip baud rate generator)
• CSI (3-wire serial I/O): 1 channel
8-bit resolution
×
8 channels
8-bit resolution
×
2 channels
Note
The pins with ancillary functions are included in the I/O pins.
3
µ
PD784214,784215,784216
FUNCTIONS (2/2)
Part Number
Item
Clock output
Buzzer output
Watch timer
Watchdog timer
Standby
Interrupt
Hardware source
Software source
Non-maskable
Maskable
Selectable from f
XX
, f
XX
/2, f
XX
/2
2
, f
XX
/2
3
, f
XX
/2
4
, f
XX
/2
5
, f
XX
/2
6
, f
XX
/2
7
, f
XT
Selectable from f
XX
/2
10
, f
XX
/2
11
, f
XX
/2
12
, f
XX
/2
13
1 channel
1 channel
• HALT/STOP/IDLE mode
• In low-power consumption mode (with subsystem clock): HALT/IDLE mode
29 (internal: 20, external: 9)
BRK instruction, BRKCS instruction, operand error
Internal: 1, external: 1
Internal: 19, external: 8
• 4 programmable priority levels
• 3 service modes: vectored interrupt/macro service/context switching
Supply voltage
Package
V
DD
= 2.2 to 5.5 V
100-pin plastic LQFP (fine pitch) (14
×
14 mm)
100-pin plastic QFP (14
×
20 mm)-
µ
PD784214
µ
PD784215
µ
PD784216
4
µ
PD784214,784215,784216
CONTENTS
1. DIFFERENCES AMONG MODELS IN
µ
PD784216 SUBSERIES ................................................
2. MAIN DIFFERENCES FROM
µ
PD78078 SUBSERIES ................................................................
3. PIN CONFIGURATION (Top View) ................................................................................................
7
8
9
4. BLOCK DIAGRAM .......................................................................................................................... 12
5. PIN
5.1
5.2
5.3
FUNCTION ...............................................................................................................................
Port Pins ................................................................................................................................
Non-port Pins .......................................................................................................................
Pin I/O Circuits and Recommended Connections of Unused Pins ..............................
13
13
15
17
6. CPU ARCHITECTURE .................................................................................................................... 20
6.1 Memory Space ...................................................................................................................... 20
6.2 CPU Registers ...................................................................................................................... 24
6.2.1 General-purpose registers ..........................................................................................................
6.2.2 Control registers ..........................................................................................................................
6.2.3 Special function registers (SFRs) ...............................................................................................
24
25
26
7. PERIPHERAL HARDWARE FUNCTIONS .....................................................................................
7.1 Ports .......................................................................................................................................
7.2 Clock Generation Circuit ....................................................................................................
7.3 Real-Time Output Port .........................................................................................................
7.4 Timer/Counter .......................................................................................................................
7.5 A/D Converter .......................................................................................................................
7.6 D/A Converter .......................................................................................................................
7.7 Serial Interface .....................................................................................................................
7.7.1 Asynchronous serial interface/3-wire serial I/O (UART/IOE) ....................................................
7.7.2 Clocked serial interface (CSI) .....................................................................................................
31
31
32
34
35
37
38
39
40
42
7.8
7.9
7.10
7.11
7.12
Clock Output Function ........................................................................................................
Buzzer Output Function ......................................................................................................
Edge Detection Function ....................................................................................................
Watch Timer ..........................................................................................................................
Watchdog Timer ...................................................................................................................
42
43
43
43
44
45
45
47
48
48
49
8. INTERRUPT FUNCTION.................................................................................................................
8.1 Interrupt Sources .................................................................................................................
8.2 Vectored Interrupt ................................................................................................................
8.3 Context Switching ................................................................................................................
8.4 Macro Service .......................................................................................................................
8.5 Application Example of Macro Service .............................................................................
5
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