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MM74C925 • MM74C926 4-Digit Counters with Multiplexed 7-Segment Output Drivers
October 1987
Revised January 2004
MM74C925 • MM74C926
4-Digit Counters with Multiplexed
7-Segment Output Drivers
General Description
The MM74C925 and MM74C926 CMOS counters consist
of a 4-digit counter, an internal output latch, NPN output
sourcing drivers for a 7-segment display, and an internal
multiplexing circuitry with four multiplexing outputs. The
multiplexing circuit has its own free-running oscillator, and
requires no external clock. The counters advance on nega-
tive edge of clock. A HIGH signal on the Reset input will
reset the counter to zero, and reset the carry-out LOW. A
LOW signal on the Latch Enable input will latch the number
in the counters into the internal output latches. A HIGH sig-
nal on Display Select input will select the number in the
counter to be displayed; a LOW level signal on the Display
Select will select the number in the output latch to be dis-
played.
The MM74C925 is a 4-decade counter and has Latch
Enable, Clock and Reset inputs.
The MM74C926 is like the MM74C925 except that it has a
display select and a carry-out used for cascading counters.
The carry-out signal goes HIGH at 6000, goes back LOW
at 0000.
Features
s
Wide supply voltage range:
3V to 6V
s
Guaranteed noise margin: 1V
s
High noise immunity: 0.45 V
CC
(typ.)
s
High segment sourcing current: 40 mA
@ V
CC
−
1.6V, V
CC
=
5V
s
Internal multiplexing circuitry
Design Considerations
Segment resistors are desirable to minimize power dissipa-
tion and chip heating. The DS75492 serves as a good digit
driver when it is desired to drive bright displays. When
using this driver with a 5V supply at room temperature, the
display can be driven without segment resistors to full illu-
mination. The user must use caution in this mode however,
to prevent overheating of the device by using too high a
supply voltage or by operating at high ambient tempera-
tures.
The input protection circuitry consists of a series resistor,
and a diode to ground. Thus input signals exceeding V
CC
will not be clamped. This input signal should not be allowed
to exceed 15V.
Ordering Code:
Order Number
MM74C925N
MM74C926N
Package Number
N16E
N18B
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Connection Diagrams
Pin Assignments for DIP
Top View
MM74C925
Top View
MM74C926
DS005919
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© 2004 Fairchild Semiconductor Corporation
MM74C925 • MM74C926
Functional Description
Reset
— Asynchronous, active high
Low, displays output of latch
Latch Enable — High, flow through condition
Low, latch condition
Clock
—Negative edge sensitive
Display Select — High, displays output of counter
Segment Output — Current sourcing with 40 mA @V
OUT
=
V
CC
−
1.6V (typ.) Also, sink capability
=
2
LTTL loads
Digit Output — Current sourcing with 1 mA @V
OUT
=
1.75V. Also, sink capability
=
2 LTTL loads
Carry-Out
— 2 LTTL loads. See carry-out waveforms.
Logic Diagrams
MM74C925
MM74C926
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2
MM74C925 • MM74C926
Absolute Maximum Ratings
(Note 1)
Voltage at Any Output Pin
Voltage at Any Input Pin
Operating Temperature
Range (T
A
)
Storage Temperature Range
Power Dissipation (P
D
)
Operating V
CC
Range
V
CC
Lead Temperature
(Soldering, 10 seconds)
260
°
C
GND
−
0.3V to V
CC
+
0.3V
GND
−
0.3V to
+
15V
−
40
°
C to
+
85
°
C
−
65
°
C to
+
150
°
C
Refer to P
D(MAX)
vs T
A
Graph
3V to 6V
6.5V
Note 1:
“Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The Electrical Characteristics table provides conditions
for actual device operation.
DC Electrical Characteristics
Min/Max limits apply at
−40°C ≤
t
j
≤ +
85°C, unless otherwise noted
Symbol
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
(Carry-Out and Digit Output Only)
Logical “0” Output Voltage
Logical “1” Input Current
Logical “0” Input Current
Supply Current
V
CC
=
5V, I
O
=
10
µA
V
CC
=
5V, V
IN
=
15V
V
CC
=
5V, V
IN
=
0V
V
CC
=
5V, Outputs Open Circuit,
V
IN
=
0V or 5V
CMOS/LPTTL INTERFACE
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
V
OUT
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
(Carry-Out and Digit Output Only)
Logical “0” Output Voltage
Output Voltage
(Segment Sourcing Output)
R
ON
Output Resistance
(Segment Sourcing Output)
Output Resistance (Segment Output)
Temperature Coefficient
I
SOURCE
I
SOURCE
I
SINK
θ
jA
Output Source Current
(Digit Output)
Output Source Current
(Carry-Out)
Output Sink Current
(All Outputs)
Thermal Resistance
MM74C925: (Note 2)
MM74C926
Note 2:
θ
jA
measured in free-air with device soldered into printed circuit board.
Parameter
V
CC
=
5V
V
CC
=
5V
Conditions
Min
3.5
Typ
Max
Units
V
1.5
4.5
0.5
0.005
−1
−0.005
20
1000
1
V
V
V
µA
µA
µA
V
CC
=
5V, I
O
= −10 µA
V
CC
=
4.75V
V
CC
=
4.75V
V
CC
=
4.75V,
I
O
= −360 µA
V
CC
=
4.75V, I
O
=
360
µA
I
OUT
= −65
mA, V
CC
=
5V, T
j
=
25°C
I
OUT
= −40
mA, V
CC
=
5V
T
j
=
100°C
T
j
=
150°C
I
OUT
= −65
mA, V
CC
=
5V, T
j
=
25°C
I
OUT
= −40
mA, V
CC
=
5V
T
j
=
100°C
T
j
=
150°C
V
CC
−
2
0.8
2.4
0.4
V
CC
−
2
V
CC
−
1.6
V
CC
−
2
V
CC
−
1.3
V
CC
−
1.2
V
CC
−
1.4
20
30
35
0.6
32
40
50
0.8
V
V
V
V
V
V
V
Ω
Ω
Ω
%/°C
mA
mA
mA
100
90
°C/W
°C/W
OUTPUT DRIVE
V
CC
=
4.75V, V
OUT
=
1.75V, T
j
=
150°C
V
CC
=
5V, V
OUT
=
0V, T
j
=
25°C
V
CC
=
5V, V
OUT
=
V
CC
, T
j
=
25°C
−1
−1.75
1.75
−2
−3.3
3.6
75
70
3
www.fairchildsemi.com
MM74C925 • MM74C926
AC Electrical Characteristics
T
A
=
25
°
C, C
L
=
50 pF, unless otherwise noted
Symbol
f
MAX
t
r
, t
f
t
WR
t
WLE
Parameter
Maximum Clock Frequency
Maximum Clock Rise or Fall Time
Reset Pulse Width
Latch Enable Pulse Width
(Note 3)
Conditions
Min
2
1.5
250
320
250
320
2500
3200
0
0
320
400
1000
5
Typ
4
3
15
T
j
=
25°C
T
j
=
100°C
T
j
=
25°C
T
j
=
100°C
T
j
=
25°C
T
j
=
100°C
T
j
=
25°C
T
j
=
100°C
T
j
=
25°C
T
j
=
100°C
100
125
100
125
1250
1600
−100
−100
160
200
Max
Units
MHz
MHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Hz
pF
V
CC
=
5V,
V
CC
=
5V
V
CC
=
5V
V
CC
=
5V
V
CC
=
5V
V
CC
=
5V
V
CC
=
5V
V
CC
=
5V
Any Input (Note 4)
T
j
=
25°C
Square Wave Clock T
j
=
100°C
t
SET(CK, LE)
Clock to Latch Enable Set-Up Time
t
LR
t
SET(R, LE)
f
MUX
C
IN
Latch Enable to Reset Wait Time
Reset to Latch Enable Set-Up Time
Multiplexing Output Frequency
Input Capacitance
Note 3:
AC Parameters are guaranteed by DC correlated testing.
Note 4:
Capacitance is guaranteed by periodic testing.
Typical Performance Characteristics
Typical Segment Current
vs Output Voltage
Maximum Power Dissipation
vs Ambient Temperature
Note:
V
D
=
Voltage across digit driver
Typical Average Segment
Current vs Segment
Resistor Value
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4