DATA SHEET
SILICON TRANSISTOR ARRAY
µ
PA1453
PNP SILICON POWER TRANSISTOR ARRAY
HIGH SPEED SWITCHING USE
INDUSTRIAL USE
DESCRIPTION
The
µ
PA1453 is PNP silicon epitaxial Power Transistor
Array that built in 4 circuits designed for driving solenoid,
relay, lamp and so on.
26.8 MAX.
4.0
PACKAGE DIMENSION
(in millimeters)
FEATURES
10 MIN.
1.4
0.6 ±0.1
2.54
1.4
0.5 ±0.1
1 2 3 4 5 6 7 8 9 10
•
Easy mount by 0.1 inch of terminal interval.
•
High h
FE
. Low V
CE(sat)
.
h
FE
= 100 to 400 (at I
C
= –2 A)
V
CE(sat)
= –0.3 V MAX. (at I
C
= –2 A)
10
2.5
ORDERING INFORMATION
Part Number
Package
10 Pin SIP
Quality Grade
Standard
µ
PA1453H
CONNECTION DIAGRAM
Please refer to "Quality grade on NEC Semiconductor Devices"
(Document number IEI-1209) published by NEC Corporation to
know the specification of quality grade on the devices and its
recommended applications.
2
3
5
7
9
4
6
8
10
ABSOLUTE MAXIMUM RATINGS (T
a
= 25 ˚C)
Collector to Base Voltage
Collector to Emitter Voltage
Emitter to Base Voltage
Collector Current (DC)
Collector Current (pulse)
Base Current (DC)
Total Power Dissipation
Total Power Dissipation
Junction Temperature
Storage Temperature
V
CBO
V
CEO
V
EBO
I
C(DC)
I
C(pulse)
*
I
B(DC)
P
T1
**
P
T2
***
T
j
–60
–60
–7
–5
–10
–1.0
3.5
28
150
V
V
V
A/unit
A/unit
A/unit
W
W
˚C
1
PIN No.
2, 4, 6, 8 : Base (B)
3, 5, 7, 9 : Collector (C)
: Emitter (E)
1, 10
T
stg
–55 to +150 ˚C
*
PW
≤
300
µ
s, Duty Cycle
≤
10 %
**
4 Circuits, T
a
= 25 ˚C
***
4 Circuits, T
c
= 25 ˚C
The information in this document is subject to change without notice.
Document No. IC-3519
(O. D. No. IC-6339)
Date Published September 1994 P
Printed in Japan
©
1994
µ
PA1453
ELECTRICAL CHARACTERISTICS (T
a
= 25 ˚C)
CHARACTERISTIC
Collector Leakage Current
Emitter Leakage Current
DC Current Gain
DC Current Gain
DC Current Gain
Collector Saturation Voltage
Base Saturation Voltage
Turn On Time
Storage Time
Fall Time
SYMBOL
I
CBO
I
EBO
h
FE1
h
FE2
h
FE3
MIN.
TYP.
MAX.
–10
–10
UNIT
TEST CONDITIONS
V
CB
= –50 V, I
E
= 0
V
EB
= –5 V, I
C
= 0
V
CE
= –1 V, I
C
= –0.1 A
V
CE
= –1 V, I
C
= –2 A
V
CE
= –2 V, I
C
= –5 A
–0.3
–1.2
1
2.5
1
V
V
I
C
= –2 A, I
B
= –0.2 A
I
C
= –2 A, I
B
= –0.2 A
I
C
= –2 A
I
B1
= –I
B2
= –0.2 A
.
.
V
CC
= –30 V, R
L
= 15
Ω
.
.
See test circuit
µ
A
µ
A
—
*
*
*
60
100
50
220
220
100
–0.2
–0.9
400
—
V
CE(sat)
*
V
BE(sat)
*
t
on
t
stg
t
f
µ
s
µ
s
µ
s
*
PW
≤
350
µ
s, Duty Cycle
≤
2 % / pulsed
SWITCHING TIME TEST CIRCUIT
.
R
L
= 15
Ω
.
V
IN
I
B1
I
B2
PW
.
PW = 50
µ
s
.
Duty Cycle
≤
2 %
T.U.T.
I
C
Base Current
Wave Form
.
V
CC
= –30 V
.
Collector
Current
Wave Form
.
V
BB
= 5 V
.
t
on
t
stg
t
f
10 %
I
C
90 %
I
B2
I
B1
2
µ
PA1453
TYPICAL CHARACTERISTICS (T
a
= 25 ˚C)
DERATING CURVE OF
SAFE OPERATING AREA
–10
dT - Percentage of Rated Current - %
100
80
60
40
20
I
C
- Collector Current - A
–5
=
1
Di 50 0 m
2 m
s
Li ssi m s
m pa s
ite ti
d on
PW
SAFE OPERATING AREA
S/
–2
–1
bL
im
ite
–0.2
–0.1
0
50
100
150
T
a
- Ambient Temperature - ˚C
–1
–2
–5
–10
–20
–50
V
CE
- Collector to Emitter Voltage - V
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
30
P
T
- Total Power Dissipation - W
P
T
- Total Power Dissipation - W
NEC
µ
PA1453
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
4 Circuits Operation
3 Circuits Operation
2 Circuits Operation
20
1 Circuit Operation
4
3
2
1
4 Circuits Operation
3 Circuits Operation
2 Circuits Operation
1 Circuit Operation
10
0
25
50
75
100
125
T
a
- Ambient Temperature - ˚C
150
0
25
50
75
100
125
T
C
- Case Temperature - ˚C
V
CEO (MAX.)
–100
150
I
C
= 10·I
B
–10
DC CURRENT GAIN vs.
COLLECTOR CURRENT
–10
V
CE(sat)
- Collector Saturation Voltage - V
V
BE(sat)
- Base Saturation Voltage - V
ss
Di
ip
at
io
d
S/b
–0.5
n
Li
m
ite
d
COLLECTOR AND BASE SATURATION
VOLTAGE vs. COLLECTOR CURRENT
d
ite
Lim
1000
h
FE
- DC Current Gain
V
CE
V
C
E
=–
–1.0
V
BE (sat)
2.0
V
100
=
–1
.0
V
–0.1
V
CE
t)
(sa
10
–0.01
–0.1
–1.0
I
C
- Collector Current - A
–10
–0.01
–0.1
–1.0
Ic - Collector Current - A
3
µ
PA1453
TRANSIENT THERMAL RESISTANCE
R
th (j-c)
- Transient Thermal Resistance - ˚C/W
100
V
CE
≥
–10 V
–10
COLLECTOR CURRENT vs. COLLECTOR TO
EMITTER VOLTAGE
I
C
- Collector Current - A
mA
–8
–2
10
–6
00
50
–1
m
A
0
–10
mA
mA
–80
A
–60 m
–40 mA
–30 mA
–4
1
–20 mA
–2
I
B
= –10 mA
0
0.1
1
10
PW - Pulse Width - ms
100
0
–0.4
–0.8
–1.2
–1.6
V
CE
- Collector to Emitter Voltage - V
–2.0
COLLECTOR CURRENT vs. COLLECTOR
TO EMITTER VOLTAGE
–1.0
.5
–3
mA
REVERSE BIAS SAFE OPERATING AREA
–10
I
C
- Collector Current - A
–2
A
.5 m
mA
mA
A
–0.6
–2.0
I
C
- Collector Current - A
–0.8
0m
–3.
A
–8
–6
–1.5
–1.0 m
–0.2
–2
I
B
= –0.5 mA
0
0
–10
–20
–30
–40
V
CE
- Collector to Emitter Voltage - V
–50
0
–20
–40
–60
–80
V
CE
- Collector to Emitter Voltage - V
–100
4
V
CEO (sus)
–0.4
–4
µ
PA1453
REFERENCE
Document Name
NEC semiconductor device reliability/quality control system.
Quality grade on NEC semiconductor devices.
Semiconductor device mounting technology manual.
Semiconductor device package manual.
Guide to quality assurance for semiconductor devices.
Semiconductor selection guide.
Document No.
TEI-1202
IEI-1209
IEI-1207
IEI-1213
MEI-1202
MF-1134
5
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