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IDT74LVC16652APV8

产品描述Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56
产品类别逻辑    逻辑   
文件大小109KB,共8页
制造商IDT (Integrated Device Technology)
下载文档 详细参数 选型对比 全文预览

IDT74LVC16652APV8概述

Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56

IDT74LVC16652APV8规格参数

参数名称属性值
零件包装代码SSOP
包装说明SSOP,
针数56
Reach Compliance Codeunknown
其他特性WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列LVC/LCX/Z
JESD-30 代码R-PDSO-G56
JESD-609代码e0
长度18.415 mm
逻辑集成电路类型REGISTERED BUS TRANSCEIVER
位数8
功能数量2
端口数量2
端子数量56
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd)7.3 ns
认证状态Not Qualified
座面最大高度2.794 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2.7 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层TIN LEAD
端子形式GULL WING
端子节距0.635 mm
端子位置DUAL
宽度7.5 mm
Base Number Matches1

文档预览

下载PDF文档
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS
REGISTERED TRANSCEIVER,
5 VOLT TOLERANT I/O
FEATURES:
DESCRIPTION:
IDT74LVC16652A
• Typical t
SK(o)
(Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
µ
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
APPLICATIONS:
• High Output Drivers: ±24mA
• Reduced system switching noise
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
The LVC16652A 16-bit registered transceiver is built using advanced
dual metal CMOS technology. This high-speed, low power device is
organized as two independent 8-bit bus transceivers with 3-state D-type
registers. For example, the OEAB and
OEBA
signals control the transceiver
functions.
The SAB and the SBA control pins are provided to select either real time
or stored data transfer. The circuitry used for select control will eliminate the
typical decoding glitch that occurs in a multiplexer during the transition
between stored and real time data. A Low input level selects real-time data
and a High level selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D-flip-
flops by the Low-to-High transitions at the appropriate clock pins (CLKAB
or CLKBA), regardless of the select or enable control pins. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The LVC16652A is ideally suited for driving high capacitance loads and
low-impedance backplanes.
All pins can be driven from either a 3.3V or 5V device. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
FUNCTIONAL BLOCK DIAGRAM
1
OEAB
1
OEBA
1
CLKBA
1
SBA
1
CLKAB
1
SAB
1
2
OEAB
2
OEBA
2
CLKBA
2
SBA
2
CLKAB
28
56
29
55
54
2
30
31
27
26
3
B REG
D
C
2
SAB
B REG
D
C
1
A
1
5
A REG
D
C
52
1
B
1
2
A
1
15
A REG
D
C
42
2
B
1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4487/2

IDT74LVC16652APV8相似产品对比

IDT74LVC16652APV8 IDT74LVC16652APA8 IDT74LVC16652APF8
描述 Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56 Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH, TSSOP-56 Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56
零件包装代码 SSOP TSSOP SSOP
包装说明 SSOP, 0.50 MM PITCH, TSSOP-56 0.40 MM PITCH, TVSOP-56
针数 56 56 56
Reach Compliance Code unknown unknown unknown
其他特性 WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列 LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 代码 R-PDSO-G56 R-PDSO-G56 R-PDSO-G56
JESD-609代码 e0 e0 e0
长度 18.415 mm 14 mm 11.3 mm
逻辑集成电路类型 REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
位数 8 8 8
功能数量 2 2 2
端口数量 2 2 2
端子数量 56 56 56
最高工作温度 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SSOP TSSOP TSSOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd) 7.3 ns 7.3 ns 7.3 ns
认证状态 Not Qualified Not Qualified Not Qualified
座面最大高度 2.794 mm 1.1 mm 1.2 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 2.7 V 2.7 V 2.7 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES
技术 CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 TIN LEAD TIN LEAD TIN LEAD
端子形式 GULL WING GULL WING GULL WING
端子节距 0.635 mm 0.5 mm 0.4 mm
端子位置 DUAL DUAL DUAL
宽度 7.5 mm 6.1 mm 4.4 mm
Base Number Matches 1 1 -
厂商名称 - IDT (Integrated Device Technology) IDT (Integrated Device Technology)

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