REJ09B0234-0500
16
H8S/2633
Group
, H8S/2633 F-ZTAT,
H8S/2633R F-ZTAT, H8S/2695
Hardware Manual
Renesas 16-Bit Single-Chip Microcomputer
H8S Family/H8S/2600 Series
H8S/2633
H8S/2632
H8S/2631
H8S/2633R
H8S/2695
HD6432633
HD64F2633
HD6432632
HD6432631
HD64F2633R
HD6432695
Rev. 5.00
Revision Date: Mar 28, 2005
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and
more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas
Technology Corp. product best suited to the customer's application; they do not convey any license
under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or
a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-
party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or
circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and
algorithms represents information on products at the time of publication of these materials, and are
subject to change by Renesas Technology Corp. without notice due to product improvements or
other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or
an authorized Renesas Technology Corp. product distributor for the latest product information
before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising
from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means,
including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data,
diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total
system before making a final decision on the applicability of the information and products. Renesas
Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the
information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or
system that is used under circumstances in which human life is potentially at stake. Please contact
Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when
considering the use of a product contained herein for any specific purposes, such as apparatus or
systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in
whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must
be exported under a license from the Japanese government and cannot be imported into a country
other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the
country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products
contained therein.
Rev. 5.00 Mar 28, 2005 page ii of lxii
General Precautions on Handling of Product
1. Treatment of NC Pins
Note: Do not connect anything to the NC pins.
The NC (not connected) pins are either not connected to any of the internal circuitry or are
used as test pins or to reduce noise. If something is connected to the NC pins, the
operation of the LSI is not guaranteed.
2. Treatment of Unused Input Pins
Note: Fix all unused input pins to high or low level.
Generally, the input pins of CMOS products are high-impedance input pins. If unused pins
are in their open states, intermediate levels are induced by noise in the vicinity, a pass-
through current flows internally, and a malfunction may occur.
3. Processing before Initialization
Note: When power is first supplied, the product’s state is undefined.
The states of internal circuits are undefined until full power is supplied throughout the
chip and a low level is input on the reset pin. During the period where the states are
undefined, the register settings and the output state of each pin are also undefined. Design
your system so that it does not malfunction because of processing while it is in this
undefined state. For those products which have a reset function, reset the LSI immediately
after the power supply has been turned on.
4. Prohibition of Access to Undefined or Reserved Addresses
Note: Access to undefined or reserved addresses is prohibited.
The undefined or reserved addresses may be used to expand functions, or test registers
may have been be allocated to these addresses. Do not access these registers; the system’s
operation is not guaranteed if they are accessed.
Rev. 5.00 Mar 28, 2005 page iii of lxii
Rev. 5.00 Mar 28, 2005 page iv of lxii
Preface
These LSIs are high-performance microcomputers with a 32-bit H8S/2600 CPU core and a variety
of built-in peripheral functions necessary for a system configuration.
The built-in peripheral devices include a 16-bit timer pulse unit (TPU), a programmable pulse
generator (PPG)*
1
, a watchdog timer (WDT), 8-bit timers, a 14-bit PWM timer (PWM)*
1
, serial
communication interfaces (SCI, IrDA*
1
), an A/D converter, a D/A converter*
1
, and I/O ports. An
I
2
C bus interface (IIC)*
1
can also be incorporated as an option. An on-chip DMA controller
(DMAC)*
1
and data transfer controller (DTC)*
1
perform high-speed data transfer without using
the CPU, enabling use of these LSIs as embedded microcomputers in various advanced control
systems. Two types of internal ROM-flash memory (F-ZTAT™*
2
) and mask ROM-are available,
providing a quick and flexible response to conditions from ramp-up through full-scale volume
production, even for applications with frequently changing specifications.
Notes: 1. This function is not available in the H8S/2695.
2. F-ZTAT is a trademark of Renesas Technology Corp.
Target Users: This manual was written for users who will be using the H8S/2633 Group,
H8S/2633R, or H8S/2695 in the design of application systems. Readers are
expected to understand the fundamentals of electrical circuits, logic circuits, and
microcomputers.
Objective:
This manual was written to provide users with an explanation of the hardware
functions and electrical characteristics of the H8S/2633 Group, H8S/2633R, and
H8S/2695. Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual
for a detailed description of the instruction set.
Notes on reading this manual:
•
In order to understand the overall functions of the chip
Read the manual according to the contents. This manual is broadly divided into parts covering
the CPU, system control functions, peripheral functions, and electrical characteristics.
•
In order to understand the details of the CPU's functions
Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual.
Example: Bit order: The MSB is on the left and the LSB is on the right.
Related Manuals:
The latest versions of all related manuals are available from our website.
Please ensure that you have the latest versions of all documents you require.
http://www.renesas.com/eng/
Rev. 5.00 Mar 28, 2005 page v of lxii
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