Hitachi Single-Chip Microcomputer
H8/3150 Series
H8/3152
HD6483152
H8/3153
HD6483153
H8/3155
HD6483155
H8/3156
HD6483156
H8/3158
HD6483158
ADE-602-182
Rev. 1.0
3/11/99
Hitachi, Ltd.
Hardware Manual
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Preface
The H8/3150 series is a single-chip microcomputer built around a high-speed H8/300 CPU core.
On-chip facilities include an EEPROM, a ROM, a RAM, two I/O ports, a random number
generator (RNG), and a watchdog timer (WDT).
On-chip EEPROM makes the H8/3150 series ideal for applications requiring nonvolatile data
storage, including smart cards and portable data banks. Security functions protect data in the
internal memory against illegal external reading and writing.
This manual describes the H8/3150 series hardware. For details of the instruction set, refer to the
H8/300 Series Programming Manual.
Contents
Section 1
1.1
1.2
1.3
Overview.......................................................................................... 1
1
4
5
5
7
Overview............................................................................................................................
Block Diagram...................................................................................................................
Pin Arrangement and Functions ........................................................................................
1.3.1 Pin Arrangement ..................................................................................................
1.3.2 Pin Functions........................................................................................................
Section 2
2.1
CPU.................................................................................................. 9
9
9
11
12
12
12
14
14
15
16
17
17
19
22
24
26
27
27
29
33
35
36
37
37
38
38
38
39
39
40
40
i
2.2
2.3
2.4
2.5
2.6
2.7
Overview............................................................................................................................
2.1.1 Features ................................................................................................................
2.1.2 CPU Registers ......................................................................................................
Register Descriptions.........................................................................................................
2.2.1 General Registers..................................................................................................
2.2.2 Control Registers..................................................................................................
2.2.3 Initial Register Values ..........................................................................................
Data Formats......................................................................................................................
2.3.1 Data Formats in General Registers.......................................................................
2.3.2 Memory Data Formats..........................................................................................
Addressing Modes .............................................................................................................
2.4.1 Addressing Modes................................................................................................
2.4.2 Effective Address Calculation..............................................................................
Instruction Set....................................................................................................................
2.5.1 Data Transfer Instructions ....................................................................................
2.5.2 Arithmetic Operations ..........................................................................................
2.5.3 Logic Operations ..................................................................................................
2.5.4 Shift Operations....................................................................................................
2.5.5 Bit Manipulations .................................................................................................
2.5.6 Branching Instructions..........................................................................................
2.5.7 System Control Instructions .................................................................................
2.5.8 EEPROM Write Instruction .................................................................................
Operating States.................................................................................................................
2.6.1 Overview ..............................................................................................................
2.6.2 Program Execution State ......................................................................................
2.6.3 Exception-Handling State ....................................................................................
2.6.4 Power-Down State................................................................................................
Exception Handling ...........................................................................................................
2.7.1 Overview ..............................................................................................................
2.7.2 Reset .....................................................................................................................
2.7.3 Interrupts ..............................................................................................................
2.8
2.7.4 Reset Start Timing................................................................................................ 41
Power-Down State ............................................................................................................. 42
2.8.1 Overview .............................................................................................................. 42
2.8.2 Transition to Sleep Mode ..................................................................................... 42
2.8.3 Exit from Sleep Mode .......................................................................................... 43
Section 3
Section 4
4.1
Memory Maps.................................................................................. 45
Random Number Generator (RNG)................................................. 51
51
51
51
52
52
53
54
55
4.2
4.3
4.4
Overview............................................................................................................................
4.1.1 Features ................................................................................................................
4.1.2 Register Configuration .........................................................................................
Register Descriptions.........................................................................................................
4.2.1 RNG Control Status Register (RCSR) .................................................................
4.2.2 RNG Result Register (RNRR)..............................................................................
Operation ...........................................................................................................................
Notes on Usage..................................................................................................................
Section 5
5.1
Watchdog Timer (WDT) ................................................................. 57
57
57
58
58
59
59
59
60
61
63
63
65
67
69
70
5.2
5.3
5.4
Overview............................................................................................................................
5.1.1 Features ................................................................................................................
5.1.2 Block Diagram......................................................................................................
5.1.3 Register Configuration .........................................................................................
5.1.4 Vector Configuration............................................................................................
Register Descriptions.........................................................................................................
5.2.1 Timer Counter (TCNT) ........................................................................................
5.2.2 Timer Control/Status Register (TCSR) ................................................................
5.2.3 Timer Counter Write Address (TCWA)...............................................................
Operation ...........................................................................................................................
5.3.1 Checking Application Program Execution Area ..................................................
5.3.2 Checking the Procedure for Writing to EEPROM ...............................................
5.3.3 Reloading TCNT by TCWA Function .................................................................
5.3.4 Initializing WDT ..................................................................................................
Notes on Usage..................................................................................................................
Section 6
6.1
RAM ................................................................................................ 71
71
71
Overview............................................................................................................................
6.1.1 Block Diagram......................................................................................................
Section 7
7.1
ROM ................................................................................................ 73
73
73
Overview............................................................................................................................
7.1.1 Block Diagram......................................................................................................
ii
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