SN54HC646, SN74HC646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS150C – DECEMBER 1982 – REVISED MARCH 2003
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
High-Current 3-State Outputs Can Drive Up
To 15 LSTTL Loads
Low Power Consumption, 80-µA Max I
CC
Typical t
pd
= 11 ns
SN54HC646 . . . JT OR W PACKAGE
SN74HC646 . . . DW OR NT PACKAGE
(TOP VIEW)
D
D
D
D
D
±6-mA
Output Drive at 5 V
Low Input Current of 1
µA
Max
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
True Data Paths
SN54HC646 . . . FK PACKAGE
(TOP VIEW)
A7
A8
GND
NC
B8
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
A1
A2
A3
NC
A4
A5
A6
DIR
SAB
CLKAB
NC
V
CC
CLKBA
SBA
4
5
6
7
8
9
10
11
3
2 1 28 27 26
25
24
23
22
21
20
19
12 13 14 15 16 17 18
OE
B1
B2
NC
B3
B4
B5
NC – No internal connection
description/ordering information
The ’HC646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control
circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.
Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB
or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed
with the ’HC646 devices.
Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver
mode, data present at the high-impedance port may be stored in either or both registers.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR
determines which bus receives data when OE is active (low). In the isolation mode (OE high), A data may be
stored in one register and /or B data may be stored in the other register.
ORDERING INFORMATION
TA
PDIP – NT
–40°C to 85°C
SOIC – DW
CDIP – JT
–55°C to 125°C
CFP – W
LCCC – FK
PACKAGE†
Tube
Tube
Tape and reel
Tube
Tube
Tube
ORDERABLE
PART NUMBER
SN74HC646NT
SN74HC646DW
SN74HC646DWR
SNJ54HC646JT
SNJ54HC646W
SNJ54HC646FK
TOP-SIDE
MARKING
SN74HC646NT
HC646
SNJ54HC646JT
SNJ54HC646W
SNJ54HC646FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
B7
B6
1
SN54HC646, SN74HC646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS150C – DECEMBER 1982 – REVISED MARCH 2003
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
When an output function is disabled, the input function is still enabled and can be used to store data. Only one
of the two buses, A or B, may be driven at a time.
FUNCTION TABLE
INPUTS
OE
X
X
H
H
L
L
L
L
DIR
X
X
X
X
L
L
H
H
CLKAB
↑
X
↑
H or L
X
X
X
H or L
CLKBA
X
↑
↑
H or L
X
H or L
X
X
SAB
X
X
X
X
X
X
L
H
SBA
X
X
X
X
L
H
X
X
A1– A8
Input
Unspecified†
Input
Input disabled
Output
Output
Input
Input
DATA I/O
B1– B8
Unspecified†
Input
Input
Input disabled
Input
Input
Output
Output
OPERATION OR FUNCTION
Store A, B unspecified†
Store B, A unspecified†
Store A and B data
Isolation, hold storage
Real-time B data to A bus
Stored B data to A bus
Real-time A data to B bus
Stored A data to B bus
† The data-output functions can be enabled or disabled by various signals at OE and DIR. Data-input functions always are enabled; i.e., data at
the bus terminals is stored on every low-to-high transition of the clock inputs.
2
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
SN54HC646, SN74HC646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS150C – DECEMBER 1982 – REVISED MARCH 2003
BUS B
21
OE
L
3
DIR
L
1
23
CLKAB CLKBA
X
X
2
SAB
X
22
SBA
L
21
OE
L
3
DIR
H
1
CLKAB
X
23
CLKBA
X
2
SAB
L
BUS B
22
SBA
X
REAL-TIME TRANSFER
BUS A TO BUS B
1
CLKAB
X
H or L
23
CLKBA
H or L
X
2
SAB
X
H
BUS B
22
SBA
H
X
TRANSFER STORED DATA
TO A AND/OR B
BUS A
REAL-TIME TRANSFER
BUS B TO BUS A
BUS B
BUS A
21
OE
X
X
H
3
DIR
X
X
X
1
23
CLKAB CLKBA
X
↑
X
↑
↑
↑
STORAGE FROM
A, B, OR A AND B
2
SAB
X
X
X
22
SBA
X
X
X
21
OE
L
L
Pin numbers shown are for the DW, JT, NT, and W packages.
Figure 1. Bus-Management Functions
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BUS A
3
DIR
L
H
BUS A
3
SN54HC646, SN74HC646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS150C – DECEMBER 1982 – REVISED MARCH 2003
logic diagram (positive logic)
OE
21
DIR
CLKBA
SBA
CLKAB
SAB
3
23
22
1
2
One of Eight Channels
1D
C1
A1
4
20
1D
C1
B1
To Seven Other Channels
Pin numbers shown are for the DW, JT, NT, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20
mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20
mA
Continuous output current, I
O
(V
O
= 0 to V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±35
mA
Continuous current through V
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±70
mA
Package thermal impedance,
θ
JA
(see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W
(see Note 3): NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-3.
4
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
SN54HC646, SN74HC646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS150C – DECEMBER 1982 – REVISED MARCH 2003
recommended operating conditions (see Note 4)
SN54HC646
MIN
VCC
VIH
Supply voltage
High-level input voltage
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VIL
VI
VO
tt
Low-level input voltage
Input voltage
Output voltage
Input transition (rise and fall) time
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 4.5 V
VCC = 6 V
0
0
2
1.5
3.15
4.2
0.5
1.35
1.8
VCC
VCC
1000
500
400
0
0
NOM
5
MAX
6
SN74HC646
MIN
2
1.5
3.15
4.2
0.5
1.35
1.8
VCC
VCC
1000
500
400
ns
V
V
V
V
NOM
5
MAX
6
UNIT
V
TA
Operating free-air temperature
–55
125
–40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
2V
IOH = –20
µA
VOH
VI = VIH or VIL
IOH = –6 mA
IOH = –7.8 mA
IOL = 20
µA
VOL
VI = VIH or VIL
IOL = 6 mA
IOL = 7.8 mA
II
IOZ
ICC
Ci
Control
inputs
A or B
Control
inputs
VI = VCC or 0
VO = VCC or 0
VI = VCC or 0,
4.5 V
6V
4.5 V
6V
2V
4.5 V
6V
4.5 V
6V
6V
6V
IO = 0
6V
2 V to 6 V
3
TA = 25°C
MIN
TYP
MAX
1.9
4.4
5.9
3.98
5.48
1.998
4.499
5.999
4.3
5.8
0.002
0.001
0.001
0.17
0.15
±0.1
±0.01
0.1
0.1
0.1
0.26
0.26
±100
±0.5
8
10
SN54HC646
MIN
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1000
±10
160
10
MAX
SN74HC646
MIN
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1000
±5
80
10
nA
µA
µA
pF
V
V
MAX
UNIT
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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