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SG3525A
Pulse Width Modulator
Control Circuit
The SG3525A pulse width modulator control circuit offers
improved performance and lower external parts count when
implemented for controlling all types of switching power supplies.
The on−chip +5.1 V reference is trimmed to
"1%
and the error
amplifier has an input common−mode voltage range that includes the
reference voltage, thus eliminating the need for external divider
resistors. A sync input to the oscillator enables multiple units to be
slaved or a single unit to be synchronized to an external system clock.
A wide range of deadtime can be programmed by a single resistor
connected between the C
T
and Discharge pins. This device also
features built−in soft−start circuitry, requiring only an external timing
capacitor. A shutdown pin controls both the soft−start circuitry and the
output stages, providing instantaneous turn off through the PWM latch
with pulsed shutdown, as well as soft−start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs
and the changing of the soft−start capacitor when V
CC
is below
nominal. The output stages are totem−pole design capable of sinking
and sourcing in excess of 200 mA. The output stage of the SG3525A
features NOR logic resulting in a low output for an off−state.
Features
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MARKING
DIAGRAMS
16
PDIP−16
N SUFFIX
CASE 648
1
16
16
SOIC−16L
DW SUFFIX
CASE 751G
1
1
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
SG3525A
AWLYYWW
1
SG3525AN
AWLYYWW
16
•
•
•
•
•
•
•
•
•
•
8.0 V to 35 V Operation
5.1 V
"
1.0% Trimmed Reference
100 Hz to 400 kHz Oscillator Range
Separate Oscillator Sync Pin
Adjustable Deadtime Control
Input Undervoltage Lockout
Latching PWM to Prevent Multiple Pulses
Pulse−by−Pulse Shutdown
Dual Source/Sink Outputs:
"400
mA Peak
Pb−Free Packages are Available*
PIN CONNECTIONS
Inv. Input
Noninv. Input
Sync
OSC. Output
C
T
R
T
Discharge
Soft-Start
1
2
3
4
5
6
7
8
(Top View)
16 V
ref
15 V
CC
14 Output B
13 V
C
12 Ground
11 Output A
10 Shutdown
9
Compensation
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 837 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
January, 2005
−
Rev. 5
836
Publication Order Number:
SG3525A/D
SG3525A
V
ref
V
CC
Ground
OSC Output
Sync
RT
CT
Discharge
Compensation
INV. Input
Noninv. Input
C
Soft-Start
Shutdown
16
15
12
4
3
6
5
7
9
1
2
8
10
-
Error
Amp
+
Oscillator
Reference
Regulator
To Internal
Circuitry
VC
13
Under-
Voltage
Lockout
Output A
NOR
Q
Q
NOR
14
Output B
11
F/F
+
- PWM
-
50mA
S
R
Latch
S
SG3525A Output Stage
V
REF
5.0k
5.0k
Figure 1. Representative Block Diagram
ORDERING INFORMATION
Device
SG3525AN
SG3525ANG
SG3525ADW
SG3525ADWG
SG3525ADWR2
SG3525ADWR2G
Package
PDIP−16
PDIP−16
(Pb−Free)
SOIC−16L
SOIC−16L
(Pb−Free)
SOIC−16L
SOIC−16L
(Pb−Free)
Shipping
†
25 Units / Rail
25 Units / Rail
47 Units / Rail
47 Units / Rail
1000 Tape & Reel
1000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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837
SG3525A
MAXIMUM RATINGS
Rating
Supply Voltage
Collector Supply Voltage
Logic Inputs
Analog Inputs
Output Current, Source or Sink
Reference Output Current
Oscillator Charging Current
Power Dissipation
T
A
= +25°C (Note 10)
T
C
= +25°C (Note 11)
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Case
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
P
D
I
O
I
ref
Symbol
V
CC
V
C
Value
+40
+40
−0.3
to +5.5
−0.3
to V
CC
±500
50
5.0
1000
2000
100
60
+150
−55
to +125
+300
°C/W
°C/W
°C
°C
°C
Unit
Vdc
Vdc
V
V
mA
mA
mA
mW
R
qJA
R
qJC
T
J
T
stg
T
Solder
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
10. Derate at 10 mW/°C for ambient temperatures above +50°C.
11. Derate at 16 mW/°C for case temperatures above +25°C.
RECOMMENDED OPERATING CONDITIONS
Characteristics
Supply Voltage
Collector Supply Voltage
Output Sink/Source Current
(Steady State)
(Peak)
Reference Load Current
Oscillator Frequency Range
Oscillator Timing Resistor
Oscillator Timing Capacitor
Deadtime Resistor Range
Operating Ambient Temperature Range
Symbol
V
CC
V
C
I
O
Min
8.0
4.5
0
0
0
0.1
2.0
0.001
0
0
Max
35
35
±100
±400
20
400
150
0.2
500
+70
mA
kHz
kW
mF
W
°C
Unit
Vdc
Vdc
mA
I
ref
f
osc
R
T
C
T
R
D
T
A
APPLICATION INFORMATION
Shutdown Options
(See Block Diagram, page 2)
Since both the compensation and soft−start terminals
(Pins 9 and 8) have current source pull−ups, either can
readily accept a pull−down signal which only has to sink a
maximum of 100
mA
to turn off the outputs. This is subject
to the added requirement of discharging whatever external
capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry
of Pin 10 which has been improved to enhance the available
shutdown options. Activating this circuit by applying a
positive signal on Pin 10 performs two functions: the PWM
latch is immediately set providing the fastest turn−off signal
to the outputs; and a 150
mA
current sink begins to discharge
the external soft−start capacitor. If the shutdown command
is short, the PWM signal is terminated without significant
discharge of the soft−start capacitor, thus, allowing, for
example, a convenient implementation of pulse−by−pulse
current limiting. Holding Pin 10 high for a longer duration,
however, will ultimately discharge this external capacitor,
recycling slow turn−on upon release.
Pin 10 should not be left floating as noise pickup could
conceivably interrupt normal operation.
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838
SG3525A
ELECTRICAL CHARACTERISTICS
(V
CC
= +20 Vdc, T
A
= T
low
to T
high
[Note 12], unless otherwise noted.)
Characteristics
REFERENCE SECTION
Reference Output Voltage (T
J
= +25°C)
Line Regulation (+8.0 V
≤
V
CC
≤
+35 V)
Load Regulation (0 mA
≤
I
L
≤
20 mA)
Temperature Stability
Total Output Variation Includes Line and Load Regulation over Temperature
Short Circuit Current (V
ref
= 0 V, T
J
= +25°C)
Output Noise Voltage (10 Hz
≤
f
≤
10 kHz, T
J
= +25°C)
Long Term Stability (T
J
= +125°C) (Note 13)
OSCILLATOR SECTION
(Note 14, unless otherwise noted.)
Initial Accuracy (T
J
= +25°C)
Frequency Stability with Voltage
(+8.0 V
≤
V
CC
≤
+35 V)
Frequency Stability with Temperature
Minimum Frequency (R
T
= 150 kW, C
T
= 0.2
mF)
Maximum Frequency (R
T
= 2.0 kW, C
T
= 1.0 nF)
Current Mirror (I
RT
= 2.0 mA)
Clock Amplitude
Clock Width (T
J
= +25°C)
Sync Threshold
Sync Input Current (Sync Voltage = +3.5 V)
ERROR AMPLIFIER SECTION
(V
CM
= +5.1 V)
Input Offset Voltage
Input Bias Current
Input Offset Current
DC Open Loop Gain (R
L
≥
10 MW)
Low Level Output Voltage
High Level Output Voltage
Common Mode Rejection Ratio (+1.5 V
≤
V
CM
≤
+5.2 V)
Power Supply Rejection Ratio (+8.0 V
≤
V
CC
≤
+35 V)
PWM COMPARATOR SECTION
Minimum Duty Cycle
Maximum Duty Cycle
Input Threshold, Zero Duty Cycle (Note 14)
Input Threshold, Maximum Duty Cycle (Note 14)
Input Bias Current
DC
min
DC
max
V
th
V
th
I
IB
−
45
0.6
−
−
−
49
0.9
3.3
0.05
0
−
−
3.6
1.0
%
%
V
V
mA
V
IO
I
IB
I
IO
A
VOL
V
OL
V
OH
CMRR
PSRR
−
−
−
60
−
3.8
60
50
2.0
1.0
−
75
0.2
5.6
75
60
10
10
1.0
−
0.5
−
−
−
mV
mA
mA
dB
V
V
dB
dB
D
fosc
DVCC
D
fosc
DT
f
min
f
max
−
−
−
−
400
1.7
3.0
0.3
1.2
−
±2.0
±1.0
±0.3
50
−
2.0
3.5
0.5
2.0
1.0
±6.0
±2.0
−
−
−
2.2
−
1.0
2.8
2.5
%
%
%
Hz
kHz
mA
V
ms
V
mA
V
ref
Reg
line
Reg
load
D
V
ref
/D T
D
V
ref
I
SC
V
n
S
5.00
−
−
−
4.95
−
−
−
5.10
10
20
20
−
80
40
20
5.20
20
50
−
5.25
100
200
50
Vdc
mV
mV
mV
Vdc
mA
mV
rms
mV/khr
Symbol
Min
Typ
Max
Unit
12. T
low
= 0°
T
high
= +70°C
13. Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average
stability from lot to lot.
14. Tested at f
osc
= 40 kHz (R
T
= 3.6 kW, C
T
= 0.01
mF,
R
D
= 0
W).
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839
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