Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . (0.8 x V
DD
) to V
DD
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
PARAMETER
HC Product Type
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CDP68HC05J4B,
V
DD
= 5V
±10%,
V
SS
= 0V, T
A
= -40
o
C to 85
o
C (Note 2)
Output Voltage
V
OL
V
OH
Output High Voltage
PA0-5, PC0-5
PC6-7
Output Low Voltage
PA0-5, PC0-5
PC6-7
Input High Voltage
PA0-5
PC0-7
RESET, IRQ, OSC1, TCAP
Input Low Voltage
PA0-5
PC0-7
RESET, IRQ, OSC1, TCAP
Data Retention Mode
Supply Current
RUN (Note 9)
WAIT (Notes 10, 13)
STOP (Note 11)
I/O Ports Hi-Z Leakage Current: PA0-5, PC0-7
Input Current: RESET, IRQ, OSC1
Capacitance Ports (As Input or Output, Note 3)
RESET, IRQ, OSC1
V
IL
V
IL
V
IL
V
RM
I
DD
I
DD
I
DD
I
IL
I
IN
C
OUT
C
IN
T
A
= 0
o
C to 70
o
C
f
OSC
= 4.0MHz External
Square Wave
T
A
= 25
o
C
V
SS
V
SS
V
SS
2
-
-
I
LOAD
< 10µA
-
V
DD
- 0.1
-
-
0.1
-
V
V
V
OH
V
OH
I
LOAD
= -0.8mA
I
LOAD
= -5.0mA
V
DD
- 0.8
V
DD
- 0.8
-
-
-
-
V
V
V
OL
V
OL
I
LOAD
= 1.6mA
I
LOAD
= 15.0mA
-
-
-
-
0.4
0.4
V
V
V
IH
V
IH
V
IH
0.7•V
DD
0.7•V
DD
0.8•V
DD
-
-
-
V
DD
V
DD
V
DD
V
V
mA
0.2•V
DD
0.2•V
DD
0.2•V
DD
-
V
V
mA
V
-
-
-
-
-
-
-
-
-
2.0
0.8
20
-
-
-
-
4.0
1.6
40
±10
±1
12
8
mA
mA
µA
µA
µA
pF
pF
4
CDP68HC05J4B, CDP68HCL05J4B, CDP68HSC05J4B
DC Electrical Specifications
PARAMETER
Input Source Current: PA0-5 Interrupts
HC Product Type
SYMBOL
I
IH
(Continued)
CONDITIONS
V
IN
≤
V
IL
(Port A)
V
IN
≥
V
IH
(Port A)
MIN
TBD
TBD
-
0.1•V
DD
TYP
-
-
0.5
1.0
MAX
TBD
TBD
-
0.5•V
DD
UNITS
µA
µA
V
V
Input Hysteresis Voltage: PA0-5
Input Hysteresis Voltage: RESET, IRQ, OSC1,
TCAP
V
HYS
V
HYS
CDP68HC05J4B
V
DD
= 3.3V
±10%,
V
SS
= 0V, T
A
= 0
o
C to 70
o
C (Note 2)
Output Voltage
V
OL
V
OH
Output High Voltage
PA0-5, PC0-5
PC6-7
Output Low Voltage
PA0-5, PC0-5
PC6-7
Input High Voltage
PA0-5
PC0-7
RESET, IRQ, OSC1, TCAP
Input Low Voltage
PA0-5
PC0-7
RESET, IRQ, OSC1, TCAP
Data Retention Mode
Supply Current
RUN (Note 9)
WAIT (Notes 10, 12)
STOP (Note 11)
I/O Ports Hi-Z Leakage Current: PA0-5, PC0-7
Input Current: RESET, IRQ, OSC1
Capacitance Ports (As Input or Output, Note 3)
RESET, IRQ, OSC1
Input Source Current: PA0-5 Interrupts
V
IH
V
IH
V
IH
V
RM
T
A
= 0
o
C to 70
o
C
V
SS
V
SS
V
SS
2
-
-
-
-
0.2•V
DD
0.2•V
DD
0.3•V
DD
-
V
V
mA
V
V
IH
V
IH
V
IH
0.7•V
DD
0.7•V
DD
0.8•V
DD
-
-
-
V
DD
V
DD
V
DD
V
V
V
V
OL
V
OL
I
LOAD
= 0.4mA
I
LOAD
= 6.0mA
-
-
-
-
0.3
0.3
V
V
V
OH
V
OH
I
LOAD
= -0.2mA
I
LOAD
= -2.0mA
V
DD
- 0.2
V
DD
- 0.3
-
-
-
-
V
V
I
LOAD
< 10µA
-
V
DD
- 0.1
-
-
0.1
-
V
V
I
DD
I
DD
I
DD
I
IL
I
IN
C
OUT
C
IN
I
IH
f
OSC
= 2.0MHz External
Square Wave
T
A
= 25
o
C
-
-
-
-
-
-
-
1.2
0.4
1.0
-
-
-
-
-
-
0.5
1.0
2.4
1.0
20
±10
±1
12
8
TBD
TBD
-
0.5•V
DD
mA
mA
µA
µA
µA
pF
pF
µA
µA
V
V
V
IN
≤
V
IL
(Port A)
V
IN
≥
V
IH
(Port A)
TBD
TBD
-
0.1•V
DD
Input Hysteresis Voltage: PA0-5
Input Hysteresis Voltage: RESET, IRQ, OSC1,
TCAP
NOTES:
V
HYS
V
HYS
2. This device contains circuitry to protect the inputs against damage due to high static voltages of electric fields; however, it is advised that
normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For
proper operation it is recommended that V
IN
and V
OUT
be constrained to the range V
SS
< (V
IN
or V
OUT
)<V
DD
. Reliability of operation
is enhanced if unused inputs except OSC2 are connected to an appropriate logic voltage level (e.g., either V
SS
or V
DD
).
3. Includes ports used as input/output pins; Ports used as input only pins, Ports used as output only pins.
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