MX29LV800BT/BB
FEATURES
8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE
3V ONLY FLASH MEMORY
•
and erase operation completion.
Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting program or
erase operation completion.
Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotected allows code changes
in previously locked sectors.
CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
100,000 minimum erase/program cycles
Latch-up protected to 100mA from -1V to VCC+1V
Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
Package type:
- 44-pin SOP
- 48-pin TSOP
- 48-pin CSP
Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
10 years data retention
• Extended single - supply voltage range 2.7V to 3.6V
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
- 3.0V only operation for read, erase and program
operation
• Fast access time: 70/90ns
• Low power consumption
- 20mA maximum active current
- 0.2uA typical standby current
• Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Fully compatible with MX29LV800T/B device
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase.
• Status Reply
- Data# polling & Toggle bit for detection of program
•
•
•
•
•
•
•
•
GENERAL DESCRIPTION
The MX29LV800BT/BB is a 8-mega bit Flash memory
organized as 1M bytes of 8 bits or 512K words of 16
bits. MXIC's Flash memories offer the most cost-effec-
tive and reliable read/write non-volatile random access
memory. The MX29LV800BT/BB is packaged in 44-pin
SOP, 48-pin TSOP, and 48-ball CSP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29LV800BT/BB offers access time as
fast as 70ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the MX29LV800BT/BB has separate chip enable
(CE#) and output enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29LV800BT/BB uses a command register to man-
age this functionality. The command register allows for
100% TTL level control inputs and fixed power supply
levels during erase and programming, while maintaining
maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29LV800BT/BB uses a 2.7V~3.6V VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamperes on
address and data pin from -1V to VCC + 1V.
P/N:PM1062
REV. 1.3, DEC. 20, 2004
1
瑞萨MCU/MPU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
