A5191HRT
1.0 Features
AMIS HART
™
Modem
• Can be used in designs presently using the SYM20C15
• Single-chip, half-duplex 1200 bits per second
FSK modem
• Bell 202 shift frequencies of 1200 Hz and 2200 Hz
• 3.3V - 5.0V power supply
• Transmit-signal wave shaping
• Receive band-pass filter
• Low power: optimal for intrinsically safe applications
• CMOS compatible
• Internal oscillator requires 460.8 kHz crystal or
ceramic resonator
• Meets HART physical layer requirements
• Industrial temperature range of -40 °C to +85 °C
• Available in a 28-pin PLCC and 32-pin LQFP packages
2.0 Description
The A5191HRT is a single-chip, CMOS modem for use in
Highway Addressable Remote Transducer (HART) field
instruments and masters. The modem and a few external
passive components provide all of the functions needed
to satisfy HART physical layer requirements including
modulation, demodulation, receive filtering, carrier
detect and transmit-signal shaping. The A5191HRT is pin-
compatible with the SYM20C15. See the Pin Description
and Functional Description sections for details on pin
compatibility with the SYM20C15.
The A5191HRT uses Phase Continuous Frequency Shift
Keying (FSK) at 1200 bits per second. To conserve power
the receive circuits are disabled during transmit
operations and vice versa. This provides the half-duplex
operation used in HART communications.
Figure 1:
28-Pin PLCC Pinout Diagram
Figure 2:
32-Pin LQFP Pinout Diagram
TEST12
4
3
2
1
28 27 26
25
M
32 31 30 29 28 27 26 25
TEST5
INRESET
TEST7
TEST8
TEST9
OTXA
IAREF
5
6
7
8
9
10
11
12 13
14 15 16 17 18
TEST11
ITXD
INRTS
VDD
VSS
IXTL
OXTL
24
23
22
XXXXYZZ
A5191HRTP
21
20
19
TEST5
TEST6
TEST7
TEST8
TEST9
VSS
OTXA
IAREF
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
M
TEST4
TEST3
VDD
TEST2
TEST1
TEST12
OCD
ORXD
24
23
22
21
20
19
18
17
TEST4
TEST3
TEST2
TEST1
ORXD
OCD
XXXXYZZ
A5191HRTL
TEST11
ITXD
INRTS
VDD
VSS
VSSA
IXTL
OXTL
ICDREF
ORXAF
VDDA
OCBIAS
TEST10
IRXAC
IRXA
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ICDREF
OCBIAS
TEST10
VSSA
VDDA
IRXA
ORXAF
IRXAC
A5191HRT
AMIS HART
™
Modem
Table 1: Pinout Summary 28-Pin PLCC, A5191HRTP (12197-504)
Pin No. Signal Name
1
2
3
4
5
6
7
8
9
10
TEST1
TEST2
TEST3
TEST4
TEST5
INRESET
TEST7
TEST8
TEST9
OTXA
Type
Input
-
-
-
Input
Input
Input
Input
Input
Output
Connect to Vss
No connect
No connect
No connect
Connect to Vss
Reset all digital logic when low
Connect to Vss
Connect to Vss
Connect to Vss
Output transmit analog. FSK modulated HART transmit signal
to 4-20 mA loop interface circuit.
Analog reference voltage
Carrier detect reference voltage
Comparator bias current
Connect to Vss
Analog supply voltage
FSK modulated HART receive signal from 4-20 mA loop interface circuit
Analog receive filter output
Analog receive comparator input
Crystal oscillator output
Crystal oscillator input
Ground
Digital supply voltage
Request to send
Input transmit date. Transmitted HART data stream from UART.
No connect
Received demodulated HART data to UART
Carrier detect output
No connect
Pin Description
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
IAREF
ICDREF
OCBIAS
TEST10
VDDA
IRXA
ORXAF
IRXAC
OXTL
IXTL
VSS
VDD
INRTS
ITXD
TEST11
ORXD
OCD
TEST12
Input
Input
Output
Input
Power
Input
Output
Input
Output
Input
Ground
Power
Input
Input
-
Output
Output
-
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A5191HRT
AMIS HART
™
Modem
Table 2: Pinout Summary 32-Pin LQFP, A5191HRTL (12197-503)
Pin No. Signal Name
1
2
3
4
5
6
7
TEST5
INRESET
TEST7
TEST8
TEST9
VSS
OTXA
Type
Input
Input
Input
Input
Input
Ground
Output
Connect to Vss
Reset all digital logic when low. Connect to VDD for normal operation
Connect to Vss
Connect to Vss
Connect to Vss
Digital ground
Output transmit analog. FSK modulated HART transmit signal to
4-20 mA loopinterface circuit.
Analog reference voltage
Carrier detect reference voltage
Comparator bias current
Connect to Vss
Analog ground
Analog supply voltage
FSK modulated HART receive signal from 4-20 mA loop interface circuit
Analog receive filter output
Analog receive comparator input
Crystal oscillator output
Crystal oscillator input
Analog ground
Digital ground
Digital supply voltage
Request to send
Input transmit data. Transmitted HART data stream from UART.
No connect
Received demodulated HART data to UART
Carrier detect output
No connect
Connect to Vss
No connect
Digital supply voltage
No connect
No connect
Pin Description
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
IAREF
ICDREF
OCBIAS
TEST10
VSSA
VDDA
IRXA
ORXAF
IRXAC
OXTL
IXTL
VSSA
VSS
VDD
INRTS
ITXD
TEST11
ORXD
OCD
TEST12
TEST1
TEST2
VDD
TEST3
TEST4
Input
Input
Output
Input
Ground
Power
Input
Output
Input
Output
Input
Ground
Ground
Power
Input
Input
-
Output
Output
-
Input
-
Power
-
-
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A5191HRT
AMIS HART
™
Modem
3.0 Pin Descriptions
IAREF: Analog Reference Voltage
This analog input sets the dc operating point of the oper-
ational amplifiers and comparators and is usually selected
to split the dc potential between V
DD
and V
SS
. See IAREF
in DC Characteristics on page 8.
is 2200 Hz. When ITXD is high, the modulator output
frequency is 1200 Hz.
IXTL: Oscillator Input
This input to the internal oscillator must be connected to
a parallel mode 460.8 kHz ceramic resonator when using
the internal oscillator or grounded when using an external
460.8 kHz clock signal.
ICDREF: Carrier Detect Reference Voltage
This analog input controls at which level the carrier detect
(OCD) becomes active. This is determined by the dc
voltage difference between ICDREF and IAREF. Selecting
ICDREF - IAREF equal to 0.08 V
DC
will set the carrier
detect to a nominal 100 mV
p-p
.
OCBIAS: Comparator Bias Current
The current through this output controls the operating param-
eters of the internal operational amplifiers and comparators.
For normal operation, OCBIAS current is set to 2.5 4A.
INRESET: Reset Digital Logic
When at logic low (V
SS
) this input holds all the digital logic
in Reset. During normal operation INRESET should be at
V
DD
. INRESET should be held low for a minimum of 10 nS
after V
DD
= 2.5 V as shown in Figure 3 below.
Figure 3:
Reset Timing
OCD: Carrier Detect Output
This output goes high when a valid input is recognized on
IRXA. If the received signal is greater than the threshold
specified on ICDREF for four cycles of the IRXA signal, the
valid input is recognized.
ORXAF*: Analog Receive Filter Output
2.5 V
VDD
INRESET
10 nS
0
VDD
0
This signal is the square wave output of the receiver high-
pass filter.
ORXD: Digital Receive Output (CMOS)
This signal outputs the digital receive data. When the
received signal (IRXA) is 1200 Hz, ORXD outputs logic
high. When the received signal (IRXA) is 2200 Hz, ORXD
outputs logic low. ORXD is qualified internally with OCD.
OTXA: Analog Transmit Output
This output provides the trapezoidal signal controlled by
ITXD. When ITXD is low, the output frequency is 2200 Hz.
When ITXD is high, the output frequency is 1200 Hz. This
output is active when INRTS is low and 0.5 V
DC
when
INRTS is high.
Note: This signal is also present on the LSI 20C15. It is
labeled as Test6. The 20C15 datasheet mentions the reset
function of this pin but does not emphasize its use to
reset the chip. Reliable operation of the modem requires
a hardware reset as shown in Figure 3. This is true for the
AMIS 12197-503 and 12197-504 as well as the LSI 20C15.
OXTL: Oscillator Output
This output from the internal oscillator must be connected to
an external 460.8 kHz clock signal or to a parallel mode 460.8
kHz ceramic resonator when using the internal oscillator.
INRTS: Request To Send
This active-low input selects the operation of the modula-
tor. OTXA is enabled when this signal is low. This signal
must be held high during power-up.
TEST(12:1): Factory Test
These are factory test pins. For normal operation, tie
these signals as per Table 1 and Table 2.
IRXA*: Analog Receive Input
This input accepts the 1200/2200 Hz signals from the
external filter.
VDD: Digital Power
This is the power for the digital modem circuitry.
IRXAC: Analog Receive Comparator Input
This is the positive input of the carrier detect comparator
and the receiver filter comparator.
VDDA: Analog Supply Voltage
This is the power for the analog modem circuitry.
ITXD: Digital Transmit Input (CMOS)
This input to the modulator accepts digital data in NRZ
form. When ITXD is low, the modulator output frequency
VSS: Ground
This is the analog and digital ground.
VSSA: Analog Ground
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A5191HRT
AMIS HART
™
Modem
4.0 Functional Description
The A5191HRT is a functional equivalent of the SYM20C15
HART Modem. It contains a transmit data modulator and
signal shaper, carrier detect circuitry, analog receiver and
demodulator circuitry and an oscillator, as shown in Figure 4.
Figure 4:
A5191HRT Block Diagram
The output of the demodulator is qualified with the carrier
detect signal (OCD), therefore, only IRXA signals large
enough to be detected (100 mV
p-p
typically) by the
carrier detect circuit produce received serial data at ORXD.
Maximum demodulator jitter is 12 percent of one bit
given input frequencies within HART specifications, a
clock frequency of 460.8 kHz (±1.0 percent) and zero
input (IRXA) asymmetry.
4.2 TRANSMIT–SIGNAL SHAPER
The transmit-signal shaper generates a HART compliant
FSK modulated signal at OTXA. Figure 6 and Figure 7
show the transmit-signal forms of the A5191HRT.
For IAREF = 1.235 V
DC
, OTXA will have a voltage swing
from approximately 0.25 to 0.75 V
DC
.
Figure 6:
OTXA Waveform (1200 Hz)
ITXD
INRTS
ORXD
Control
Logic
Modulator
and Transmit
Wave Shaping
OTXA
OCD
IXTL
OXTL
Carrier
Detect
Oscillator
Receive
Filter and
Demodulator
IRXA
IRXAC
ORXAF
IAREF
ICDREF
OCBIAS
The internal HART modem modulates the transmit-signal
and demodulates the receive signal. The transmit-signal
shaper enables the A5191HRT to transmit a HART
compliant signal. The carrier is detected by comparing
the receiver filter output with the difference between two
external voltage references. The analog receive circuitry
band-pass filters the received signal for input to the
modem and the carrier detect circuitry. The oscillator
provides the modem with a stable time base using either
a simple external resonator or an external clock source.
4.1 A5191HRTLOGIC
The modem consists of a modulator and demodulator. The
modem uses shift frequencies of nominally 1200 Hz (for a
1) and 2200 Hz (for a 0). The bit rate is 1200 bits/second.
T
Modulator
The modulator accepts digital data in NRZ form at the
ITXD input and generates the FSK modulated signal at
the OTXA output. INRTS must be a logic low for the mod-
ulator to be active.
Ch3
200mV
M 200µs Ch 3
4mV
Figure 7:
OTXA Waveform (2200 Hz)
Demodulator
The demodulator accepts an FSK signal at the IRXA input
and reproduces the original modulating signal at the
ORXD output. The nominal bit rate is 1200 bits per sec-
ond. Figure 5 illustrates the demodulation process.
Figure 5:
Demodulator Signal Timing
T
IRXA
ORXD
1
1
0
1
1
Ch3
200mV
M 200µs Ch 3
4mV
1/1200 Sec
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