without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc.-
www.issi.com
Rev. C1
03/06/2017
1
IS62WV10248EALL/BLL
IS65WV10248EALL/BLL
PIN CONFIGURATIONS (1Mx8)
48-pin mini BGA (B) (6mm x 8mm)
44-Pin TSOP (Type II)
PIN DESCRIPTIONS
A0-A19
CS2
Address Inputs
Chip Enable 1 Input
Chip Enable 2 Input
Output Enable Input
Write Enable Input
I/O0-I/O7
NC
V
DD
Vss
Input/Output
No Connection
Power
Ground
Integrated Silicon Solution, Inc.-
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Rev. C1
03/06/2017
2
IS62WV10248EALL/BLL
IS65WV10248EALL/BLL
FUNCTION DESCRIPTION
SRAM is one of random access memories. Each byte has an address and can be accessed randomly. SRAM has three
different modes supported. Each function is described below with Truth Table.
STANDBY MODE
Device enters standby mode when deselected (
HIGH or CS2 LOW). The input and output pins (I/O0-7) are placed
in a high impedance state. The current consumption in this mode will be either ISB1 or ISB2 depending on the input
level. CMOS input in this mode will maximize saving power.
WRITE MODE
Write operation issues with Chip selected (
LOW and CS2 HIGH) and Write Enable (
) input LOW. The input and
output pins(I/O0-7) are in data input mode. Output buffers are closed during this time even if
is LOW.
READ MODE
Read operation issues with Chip selected (
LOW and CS2 HIGH) and Write Enable (
) input HIGH. When
LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted.
In the READ mode, output buffers can be turned off by pulling
HIGH. In this mode, internal device operates as
READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used.
is
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
X
X
H
H
L
H
X
L
L
L
CS2
X
L
H
H
H
X
X
H
L
X
I/O Operation
High-Z
High-Z
High-Z
Dout
Din
VDD Current
ISB1, ISB2
ISB1, ISB2
Icc
Icc
Icc
Integrated Silicon Solution, Inc.-
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Rev. C1
03/06/2017
3
IS62WV10248EALL/BLL
IS65WV10248EALL/BLL
ABSOLUTE MAXIMUM RATINGS AND OPERATING RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Vt er m
tBIAS
V
DD
tStg
I
OUT
Notes:
Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
V
DD
Related to GND
Storage Temperature
DC Output Current (LOW)
Value
–0.2 to +3.9(V
DD
+0.3V)
–55 to +125
–0.2 to +3.9(V
DD
+0.3V)
–65 to +150
20
Unit
V
C
V
C
mA
OPERATING RANGE
(1)
Range
Commercial
Industrial
Automotive
Commercial
Industrial
Automotive
Note:
1.
Device Marking
IS62WV10248EALL
IS62WV10248EALL
IS65WV10248EALL
IS62WV10248EBLL
IS62WV10248EBLL
IS65WV10248EBLL
Ambient Temperature
0C to +70C
-40C to +85C
-40C to +125C
0C to +70C
-40C to +85C
-40C to +125C
V
DD
(min)
1.65V
1.65V
1.65V
2.2V
2.2V
2.2V
V
DD
(typ)
1.8V
1.8V
1.8V
3.3V
3.3V
3.3V
V
DD
(max)
2.2V
2.2V
2.2V
3.6V
3.6V
3.6V
Full device AC operation assumes a 100 µs ramp time from 0 to Vcc(min) and 200 µs wait time after Vcc stabilization.
PIN CAPACITANCE
(1)
Parameter
Input capacitance
DQ capacitance (IO0–IO7)
Symbol
C
IN
C
I/O
Test Condition
T
A
= 25°C, f = 1 MHz, V
DD
= V
DD
(typ)
Max
10
10
Units
pF
pF
Note:
1. These parameters are guaranteed by design and tested by a sample basis only.
THERMAL CHARACTERISTICS
(1)
Parameter
Thermal resistance from junction to ambient (airflow = 1m/s)
Thermal resistance from junction to case
Note:
1. These parameters are guaranteed by design and tested by a sample basis only.
Symbol
R
θJA
R
θJC
Rating
43.22
13.35
Units
°C/W
°C/W
Integrated Silicon Solution, Inc.-
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Rev. C1
03/06/2017
4
IS62WV10248EALL/BLL
IS65WV10248EALL/BLL
ELECTRICAL CHARACTERISTICS
IS62(5)WV10248EALL DC ELECTRICAL CHARACTERISTICS-I (OVER THE OPERATING RANGE)
Symbol
V
OH
V
OL
(1)
V
IH
(1)
V
IL
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
I
OH
= -0.1 mA
I
OL
= 0.1 mA
Min.
1.4
—
1.4
–0.2
–1
–1
Max.
—
0.2
V
DD
+ 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
GND < V
IN
< V
DD
GND < V
IN
< V
DD
, Output Disabled
Notes:
1. VILL(min) = -1.0V AC (pulse width < 10ns). Not 100% tested.
VIHH (max) = VDD + 1.0V AC (pulse width < 10ns). Not 100% tested.
IS62(5)WV10248EBLL DC ELECTRICAL CHARACTERISTICS-I (OVER THE OPERATING RANGE)
Symbol
V
OH
V
OL
V
IH
V
IL
(1)
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
(1)
I
LI
I
LO
Test Conditions
2.2 ≤ V
DD
< 2.7, I
OH
= -0.1 mA
2.7 ≤ V
DD
≤ 3.6, I
OH
= -1.0 mA
2.2 ≤ V
DD
< 2.7, I
OL
= 0.1 mA
2.7 ≤ V
DD
≤ 3.6, I
OL
= 2.1 mA
2.2 ≤ V
DD
< 2.7
2.7 ≤ V
DD
≤ 3.6
2.2 ≤ V
DD
< 2.7
2.7 ≤ V
DD
≤ 3.6
GND < V
IN
< V
DD
GND < V
IN
< V
DD
, Output Disabled
Min.
2.0
2.4
—
—
1.8
2.2
–0.3
–0.3
–1
–1
Max.
—
—
0.4
0.4
V
DD
+ 0.3
V
DD
+ 0.3
0.6
0.8
1
1
Unit
V
V
V
V
V
V
V
V
µA
µA
Notes:
1. VILL(min) = -2.0V AC (pulse width < 10ns). Not 100% tested.
VIHH (max) = VDD + 2.0V AC (pulse width < 10ns). Not 100% tested.
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