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MC10H640, MC100H640
68030/040 PECL to TTL
Clock Driver
Description
The MC10H/100H640 generates the necessary clocks for the
68030, 68040 and similar microprocessors. It is guaranteed to meet the
clock specifications required by the 68030 and 68040 in terms of
part−to−part skew, within−part skew and also duty cycle skew.
The user has a choice of using either TTL or PECL (ECL referenced
to +5.0 V) for the input clock. TTL clocks are typically used in present
MPU systems. However, as clock speeds increase to 50 MHz and
beyond, the inherent superiority of ECL (particularly differential
ECL) as a means of clock signal distribution becomes increasingly
evident. The H640 also uses differential PECL internally to achieve its
superior skew characteristic.
The H640 includes divide−by−two and divide−by−four stages, both
to achieve the necessary duty cycle skew and to generate MPU clocks
as required. A typical 50 MHz processor application would use an
input clock running at 100 MHz, thus obtaining output clocks at
50 MHz and 25 MHz (see Logic Diagram).
Features
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PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
•
•
•
•
•
•
•
Generates Clocks for 68030/040
Meets 030/040 Skew Requirements
TTL or PECL Input Clock
Extra TTL and PECL Power/Ground Pins
Asynchronous Reset
Single +5.0 V Supply
Pb−Free Packages are Available*
MCxxxH640G
AWLYYWW
Function
Reset (R):
LOW on RESET forces all Q outputs LOW and all Q
outputs HIGH.
Power−Up:
The device is designed to have the POS edges of the
÷
2
and
÷
4 outputs synchronized at power up.
Select (SEL):
LOW selects the ECL input source (DE/DE). HIGH
selects the TTL input source (DT).
The H640 also contains circuitry to force a stable state of the ECL
input differential pair, should both sides be left open. In this case, the
DE side of the input is pulled LOW, and DE goes HIGH.
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
November, 2006
−
Rev. 8
1
Publication Order Number:
MC10H640/D
MC10H640, MC100H640
TTL Outputs
VT
25
Q2
GT
GT
Q3
VT
VT
Q0
26
27
28
1
2
3
4
5
Q1
6
GT
7
GT
8
Q4
9
Q5
10
VT
11
SEL
VT
24
Q1
23
GT
22
GT
21
Q0
20
VT
19
18
17
16
15
14
13
12
V
BB
DE
DE
VE
R
GE
DT
SEL
Q1
Q0
Q1
Q2
MUX
÷
2
Q3
Q0
TTL/ECL Clock Inputs
V
BB
DE
DE
DT
÷
4
Q4
Q5
TTL Control Inputs
R
Figure 1. Pinout: PLCC−28
(Top View)
Table 1. PIN DESCRIPTION
PIN
GT
VT
VE
GE
DE, DE
V
BB
DT
Qn, Qn
SEL
R
FUNCTION
TTL Ground (0 V)
TTL V
CC
(+5.0 V)
ECL V
CC
(+5.0 V)
ECL Ground (0 V)
ECL Signal Input (positive ECL)
V
BB
Reference Output
TTL Signal Input
Signal Outputs (TTL)
Input Select (TTL)
Reset (TTL)
Figure 2. Logic Diagram
Table 2. DC CHARACTERISTICS
(V
T
= V
E
= 5.0 V
±
5%)
0°C
Symbol
I
EE
I
CCH
I
CCL
Characteristic
Power Supply Current
ECL
TTL
Condition
VE Pin
Total all VT pins
Min
Max
57
30
30
25°C
Min
Max
57
30
30
85°C
Min
Max
57
30
30
Unit
mA
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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2
MC10H640, MC100H640
Table 3. 10H PECL DC CHARACTERISTICS
(V
T
= V
E
= 5.0 V
±
5%)
0°C
Symbol
I
INH
I
INL
V
IH
1
V
IL
1
V
BB
1
Characteristic
Input HIGH Current
Input LOW Current
Input HIGH Voltage
Input LOW Voltage
Output Reference Voltage
V
E
= 5.0 V
Condition
Min
0.5
3.83
3.05
3.62
Max
255
4.16
3.52
3.73
Min
0.5
3.87
3.05
3.65
25°C
Max
175
4.19
3.52
3.75
Min
0.5
3.94
3.05
3.69
85°C
Max
175
4.28
3.555
3.81
Unit
mA
V
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. PECL levels are referenced to V
CC
and will vary 1:1 with the power supply. The values shown are for V
CC
= 5.0V.
Table 4. 100H PECL DC CHARACTERISTICS
(V
T
= V
E
= 5.0 V
±
5%)
0°C
Symbol
I
INH
I
INL
V
IH
2
V
IL
2
V
BB
2
Characteristic
Input HIGH Current
Input LOW Current
Input HIGH Voltage
Input LOW Voltage
Output Reference Voltage
V
E
= 5.0 V
Condition
Min
0.5
3.835
3.19
3.62
Max
255
4.12
3.525
3.74
Min
0.5
3.835
3.19
3.62
25°C
Max
175
4.12
3.525
3.74
Min
0.5
3.835
3.19
3.62
85°C
Max
175
4.12
3.525
3.74
Unit
mA
V
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. PECL levels are referenced to V
CC
and will vary 1:1 with the power supply. The values shown are for V
CC
= 5.0V.
Table 5. TTL DC CHARACTERISTICS
(V
T
= V
E
= 5.0 V
±
5%)
0°C
Symbol
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
V
IK
I
OS
Characteristic
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Output HIGH Voltage
Output LOW Voltage
Input Clamp Voltage
Output Short Circuit Current
V
IN
= 2.7 V
V
IN
= 7.0 V
V
IN
= 0.5 V
I
OH
=
−3.0
mA
I
OH
=
−15
mA
I
OL
= 24 mA
I
IN
=
−18
mA
V
OUT
= 0 V
−100
2.5
2.0
0.5
−1.2
−225
−100
Condition
Min
2.0
Max
0.8
20
100
−0.6
2.5
2.0
0.5
−1.2
−225
−100
25°C
Min
2.0
Max
0.8
20
100
−0.6
2.5
2.0
0.5
−1.2
−225
85°C
Min
2.0
Max
0.8
20
100
−0.6
Unit
V
mA
mA
V
V
V
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC10H640, MC100H640
Table 6. AC CHARACTERISTICS
(V
T
= V
E
= 5.0 V
±
5%)
0°C
Symbol
t
PLH
t
PLH
tskwd*
t
PLH
t
PLH
t
PLH
t
PLH
t
PD
t
R
t
F
f
max
t
pw
t
rr
Characteristic
Propagation Delay ECL
D to Output
Propagation Delay TTL
D to Output
Within−Device Skew
Propagation Delay ECL
D to Output
Propagation Delay TTL
D to Output
Propagation Delay ECL
D to Output
Propagation Delay TTL
D to Output
Propagation Delay
R to Output
Output Rise/Fall Time
0.8 V to 2.0 V
Maximum Input Frequency
Minimum Pulse Width
Reset Recovery Time
All Outputs
All Outputs
Q4, Q5
Q0, Q1
Q0
−
Q3
Condition
CL = 25 pF
CL = 25 pF
CL = 25 pF
CL = 25 pF
CL = 25 pF
CL = 25 pF
CL = 25 pF
CL = 25 pF
CL = 25 pF
CL = 25 pF
135
1.50
1.25
4.0
4.0
4.0
4.0
4.3
Min
4.0
4.0
Max
6.0
6.0
0.5
6.0
6.0
6.0
6.0
6.3
2.5
2.5
135
1.50
1.25
4.0
4.0
4.0
4.0
4.3
25°C
Min
4.0
4.0
Max
6.0
6.0
0.5
6.0
6.0
6.0
6.0
6.3
2.5
2.5
135
1.50
1.25
4.2
4.3
4.2
4.3
5.0
85°C
Min
4.2
4.3
Max
6.2
6.3
0.5
6.2
6.3
6.2
6.3
7.0
2.5
2.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Within−Device Skew defined as identical transitions on similar paths through a device.
Table 7. V
CC
and C
L
RANGES TO MEET DUTY CYCLE REQUIREMENTS
(0°C
≤
T
A
≤
85°C Output Duty Cycle Measured Relative to 1.5 V)
Symbol
Characteristic
Range of V
CC
and CL to meet mini-
mum pulse width
(HIGH or LOW)
= 11.5 ns at f
out
≤
40 MHz
Range of V
CC
and CL to meet mini-
mum pulse width
(HIGH or LOW)
= 9.5 ns at 40 < f
out
≤
50 MHz
V
CC
CL
Condition
Q0
−
Q3
Q0
−
Q1
Min
4.75
10
Nom
5.0
Max
5.25
50
Unit
V
pF
V
CC
CL
Q0
−
Q3
4.875
15
5.0
5.125
27
V
pF
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