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GS832236E-225MT

产品描述Cache SRAM, 1MX36, 7ns, CMOS, PBGA165, 17 X 15 MM, 1 MM PITCH, FPBGA-165
产品类别存储   
文件大小679KB,共39页
制造商GSI Technology
官网地址http://www.gsitechnology.com/
下载文档 详细参数 选型对比 全文预览

GS832236E-225MT概述

Cache SRAM, 1MX36, 7ns, CMOS, PBGA165, 17 X 15 MM, 1 MM PITCH, FPBGA-165

GS832236E-225MT规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称GSI Technology
零件包装代码BGA
包装说明LBGA, BGA165,11X15,40
针数165
Reach Compliance Codeunknown
ECCN代码3A991.B.2.B
Is SamacsysN
最长访问时间7 ns
其他特性FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY
最大时钟频率 (fCLK)225 MHz
I/O 类型COMMON
JESD-30 代码R-PBGA-B165
长度17 mm
内存密度37748736 bit
内存集成电路类型CACHE SRAM
内存宽度36
功能数量1
端子数量165
字数1048576 words
字数代码1000000
工作模式SYNCHRONOUS
最高工作温度125 °C
最低工作温度-55 °C
组织1MX36
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码LBGA
封装等效代码BGA165,11X15,40
封装形状RECTANGULAR
封装形式GRID ARRAY, LOW PROFILE
并行/串行PARALLEL
电源2.5/3.3 V
认证状态Not Qualified
座面最大高度1.5 mm
最大待机电流0.2 A
最小待机电流2.3 V
最大压摆率0.36 mA
最大供电电压 (Vsup)2.7 V
最小供电电压 (Vsup)2.3 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子形式BALL
端子节距1 mm
端子位置BOTTOM
宽度15 mm
Base Number Matches1

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GS832218/36(B/E)-225M
GS832272C-225M
119-, 165-, & 209-Pin BGA
Military Temp
Features
• Military Temperature Range
• FT pin for user-configurable flow through or pipeline operation
• Single/Dual Cycle Deselect selectable
• IEEE 1149.1 JTAG-compatible Boundary Scan
• ZQ mode pin for user-selectable high/low output drive
• 2.5 V +10%/–10% core power supply
• 3.3 V +10%/–10% core power supply
• 2.5 V or 3.3 V I/O supply
• LBO pin for Linear or Interleaved Burst mode
• Internal input resistors on mode pins allow floating mode pins
• Default to SCD x18/x36 Interleaved Pipeline mode
• Byte Write (BW) and/or Global Write (GW) operation
• Internal self-timed write cycle
• Automatic power-down for portable applications
• JEDEC-standard 119-, 165-, and 209-bump BGA package
• RoHS-compliant packages available
2M x 18, 1M x 36, 512K x 72
36Mb S/DCD Sync Burst SRAMs
225 MHz
2.5 V or 3.3 V V
DD
2.5 V or 3.3 V I/O
either linear or interleave order with the Linear Burst Order (LBO)
input. The Burst function need not be used. New addresses can be
loaded on every cycle with no degradation of chip performance.
Flow Through/Pipeline Reads
The function of the Data Output register can be controlled by the
user via the FT mode . Holding the FT mode pin low places the
RAM in Flow Through mode, causing output data to bypass the
Data Output Register. Holding FT high places the RAM in
Pipeline mode, activating the rising-edge-triggered Data Output
Register.
SCD and DCD Pipelined Reads
The GS832218/36/72-225M is a SCD (Single Cycle Deselect) and
DCD (Dual Cycle Deselect) pipelined synchronous SRAM. DCD
SRAMs pipeline disable commands to the same degree as read
commands. SCD SRAMs pipeline deselect commands one stage
less than read commands. SCD RAMs begin turning off their
outputs immediately after the deselect command has been
captured in the input registers. DCD RAMs hold the deselect
command for one full cycle and then begin turning off their
outputs just after the second rising edge of clock. The user may
configure this SRAM for either mode of operation using the SCD
mode input.
Byte Write and Global Write
Byte write operation is performed by using Byte Write enable
(BW) input combined with one or more individual byte write
signals (Bx). In addition, Global Write (GW) is available for
writing all bytes at one time, regardless of the Byte Write control
inputs.
FLXDrive™
The ZQ pin allows selection between high drive strength (ZQ low)
for multi-drop bus applications and normal drive strength (ZQ
floating or high) point-to-point applications. See the Output Driver
Characteristics chart for details.
Functional Description
Applications
The GS832218/36/72-225M is a
37,748,736
-bit high
performance synchronous SRAM with a 2-bit burst address
counter. Although of a type originally developed for Level 2
Cache applications supporting high performance CPUs, the device
now finds application in synchronous SRAM applications, ranging
from DSP main store to networking chip set support.
Controls
Addresses, data I/Os, chip enable (E1), address burst control
inputs (ADSP, ADSC, ADV), and write control inputs (Bx, BW,
GW) are synchronous and are controlled by a positive-edge-
triggered clock input (CK). Output enable (G) and power down
control (ZZ) are asynchronous inputs. Burst cycles can be initiated
with either ADSP or ADSC inputs. In Burst mode, subsequent
burst addresses are generated internally and are controlled by
ADV. The burst address counter may be configured to count in
Parameter Synopsis
-225M
t
KQ
(x18/x36)
t
KQ
(x72)
tCycle
Curr (x18)
Curr (x36)
Curr (x72)
t
KQ
tCycle
Curr (x18)
Curr (x36)
Curr (x72)
2.7
3.0
4.4
315
415
460
7.0
7.0
230
325
360
Unit
ns
ns
ns
mA
mA
mA
ns
ns
mA
mA
mA
Pipeline
3-1-1-1
Flow Through
2-1-1-1
Rev: 1.00 1/2011
1/39
© 2011, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS832236E-225MT相似产品对比

GS832236E-225MT GS832272C-225MT GS832272C-225M GS832236E-225M GS832236B-225M GS832236B-225MT GS832218E-225M GS832218E-225MT GS832218B-225MT GS832218B-225M
描述 Cache SRAM, 1MX36, 7ns, CMOS, PBGA165, 17 X 15 MM, 1 MM PITCH, FPBGA-165 Cache SRAM, 512KX72, 7ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209 Cache SRAM, 512KX72, 7ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209 Cache SRAM, 1MX36, 7ns, CMOS, PBGA165, 17 X 15 MM, 1 MM PITCH, FPBGA-165 Cache SRAM, 1MX36, 7ns, CMOS, PBGA119, 22 X 14 MM, 1.27 MM PITCH, FPBGA-119 Cache SRAM, 1MX36, 7ns, CMOS, PBGA119, 22 X 14 MM, 1.27 MM PITCH, FPBGA-119 Cache SRAM, 2MX18, 7ns, CMOS, PBGA165, 17 X 15 MM, 1 MM PITCH, FPBGA-165 Cache SRAM, 2MX18, 7ns, CMOS, PBGA165, 17 X 15 MM, 1 MM PITCH, FPBGA-165 Cache SRAM, 2MX18, 7ns, CMOS, PBGA119, 22 X 14 MM, 1.27 MM PITCH, FPBGA-119 Cache SRAM, 2MX18, 7ns, CMOS, PBGA119, 22 X 14 MM, 1.27 MM PITCH, FPBGA-119
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
零件包装代码 BGA BGA BGA BGA BGA BGA BGA BGA BGA BGA
包装说明 LBGA, BGA165,11X15,40 LBGA, BGA209,11X19,40 LBGA, BGA209,11X19,40 LBGA, BGA165,11X15,40 BGA, BGA119,7X17,50 BGA, BGA119,7X17,50 LBGA, BGA165,11X15,40 LBGA, BGA165,11X15,40 BGA, BGA119,7X17,50 BGA, BGA119,7X17,50
针数 165 209 209 165 119 119 165 165 119 119
Reach Compliance Code unknown compliant compliant unknown unknown unknown unknown unknown unknown unknown
ECCN代码 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B
最长访问时间 7 ns 7 ns 7 ns 7 ns 7 ns 7 ns 7 ns 7 ns 7 ns 7 ns
其他特性 FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY FLOW-THROUGH OR PIPELINED ARCHITECTURE, IT ALSO OPERATES AT AS 3.3V SUPPLY
最大时钟频率 (fCLK) 225 MHz 225 MHz 225 MHz 225 MHz 225 MHz 225 MHz 225 MHz 225 MHz 225 MHz 225 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-PBGA-B165 R-PBGA-B209 R-PBGA-B209 R-PBGA-B165 R-PBGA-B119 R-PBGA-B119 R-PBGA-B165 R-PBGA-B165 R-PBGA-B119 R-PBGA-B119
长度 17 mm 22 mm 22 mm 17 mm 22 mm 22 mm 17 mm 17 mm 22 mm 22 mm
内存密度 37748736 bit 37748736 bit 37748736 bit 37748736 bit 37748736 bit 37748736 bit 37748736 bit 37748736 bit 37748736 bit 37748736 bit
内存集成电路类型 CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM
内存宽度 36 72 72 36 36 36 18 18 18 18
功能数量 1 1 1 1 1 1 1 1 1 1
端子数量 165 209 209 165 119 119 165 165 119 119
字数 1048576 words 524288 words 524288 words 1048576 words 1048576 words 1048576 words 2097152 words 2097152 words 2097152 words 2097152 words
字数代码 1000000 512000 512000 1000000 1000000 1000000 2000000 2000000 2000000 2000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
组织 1MX36 512KX72 512KX72 1MX36 1MX36 1MX36 2MX18 2MX18 2MX18 2MX18
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LBGA LBGA LBGA LBGA BGA BGA LBGA LBGA BGA BGA
封装等效代码 BGA165,11X15,40 BGA209,11X19,40 BGA209,11X19,40 BGA165,11X15,40 BGA119,7X17,50 BGA119,7X17,50 BGA165,11X15,40 BGA165,11X15,40 BGA119,7X17,50 BGA119,7X17,50
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY GRID ARRAY GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY GRID ARRAY
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
电源 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V 2.5/3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.5 mm 1.7 mm 1.7 mm 1.5 mm 1.99 mm 1.99 mm 1.5 mm 1.5 mm 1.99 mm 1.99 mm
最大待机电流 0.2 A 0.2 A 0.2 A 0.2 A 0.2 A 0.2 A 0.2 A 0.2 A 0.2 A 0.2 A
最小待机电流 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V
最大压摆率 0.36 mA 0.39 mA 0.39 mA 0.36 mA 0.36 mA 0.36 mA 0.28 mA 0.28 mA 0.28 mA 0.28 mA
最大供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
最小供电电压 (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V
标称供电电压 (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
表面贴装 YES YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
端子形式 BALL BALL BALL BALL BALL BALL BALL BALL BALL BALL
端子节距 1 mm 1 mm 1 mm 1 mm 1.27 mm 1.27 mm 1 mm 1 mm 1.27 mm 1.27 mm
端子位置 BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
宽度 15 mm 14 mm 14 mm 15 mm 14 mm 14 mm 15 mm 15 mm 14 mm 14 mm
厂商名称 GSI Technology GSI Technology GSI Technology GSI Technology - - GSI Technology GSI Technology GSI Technology GSI Technology
Base Number Matches 1 1 1 1 1 1 - - - -

 
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