Preliminary Data Sheet
April 2004
AGR18060E
60 W, 1805 MHz—1880 MHz, LDMOS RF Power Transistor
Introduction
The AGR18060E is a 60 W, 26 V N-channel laterally
diffused metal oxide semiconductor (LDMOS)
RF power field effect transistor (FET) suitable for
enhanced data for global evolution (EDGE), global
system for mobile communication (GSM), and single-
carrier or multicarrier class AB power amplifier appli-
cations. It is packaged in an industry-standard pack-
age and is capable of delivering a minimum output
power of 60 W, which makes it ideally suited for
today’s wireless base station RF power amplifier
applications.
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case:
AGR18060EU
AGR18060EF
Sym
Value
Unit
R
θJC
R
θJC
1.00
1.00
°C/W
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Total Dissipation at T
C
= 25 °C:
AGR18060EU
AGR18060EF
Derate Above 25
°C:
AGR18060EU
AGR18060EF
Operating Junction Tempera-
ture
Storage Temperature Range
Sym Value Unit
65
Vdc
V
DSS
V
GS
–0.5, 15 Vdc
P
D
P
D
—
—
T
J
175
175
1.00
1.00
200
W
W
W/°C
W/°C
°C
°C
AGR18060EU (unflanged)
AGR18060EF (flanged)
Figure 1. Available Packages
T
STG
–65, 150
Features
s
s
s
s
Typical EDGE performance:
1880 MHz, 26 V, I
DQ
= 500 mA
— Output power (P
OUT
): 20 W.
— Power gain: 15 dB.
— Efficiency: 34%.
— Modulation spectrum:
@ ±400 kHz = –62 dBc.
@ ±600 kHz = –73 dBc.
— Error vector magnitude (EVM) = 2%.
Typical performance over entire GSM band:
— P1dB: 60 W typ.
— Power gain: @ P1dB = 14 dB.
— Efficiency @ P1dB = 52% typical.
— Return loss: –10 dB.
High-reliability, gold-metalization process.
Low hot carrier injection (HCI) induced bias drift
over 20 years.
Internally matched.
High gain, efficiency, and linearity.
Integrated ESD protection.
Device can withstand 10:1 voltage standing wave
ratio (VSWR) at 26 Vdc, 1805 MHz, 60 W continu-
ous wave (CW) output power.
Large signal impedance parameters available.
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3.
ESD Rating*
AGR18060E
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
s
s
s
s
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
s
AGR18060E
60 W, 1805 MHz—1880 MHz, LDMOS RF Power Transistor
Preliminary Data Sheet
April 2004
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: T
C
= 30 °C.
Table 4. dc Characteristics
Parameter
Off Characteristics
Drain-source Breakdown Voltage (V
GS
= 0 V, I
D
= 90 µA)
Gate-source Leakage Current (V
GS
= 5 V, V
DS
= 0 V)
Zero Gate Voltage Drain Leakage Current (V
DS
= 26 V, V
GS
= 0 V)
On Characteristics
Forward Transconductance (V
DS
= 10 V, I
D
= 0.45 A)
Gate Threshold Voltage (V
DS
= 10 V, I
D
= 180 µA)
Gate Quiescent Voltage (V
DS
= 26 V, I
D
= 500 mA)
Drain-source On-voltage (V
GS
= 10 V, I
D
= 0.45 A)
Table 5. RF Characteristics
Parameter
Dynamic Characteristics
Transfer Capacitance
(V
DS
= 26 V, V
GS
= 0, f = 1 MHz)
(Part is internally matched both on input and output.)
Two-Tone Common-source Amplifier Power Gain
(V
DD
= 26 Vdc, P
OUT
= 60 W PEP, I
DQ
= 500 mA, f = 1805 MHz
and 1880 MHz, tone spacing = 100 kHz)
Two-Tone Drain Efficiency
(V
DD
= 26 Vdc, P
OUT
= 60 W PEP, I
DQ
= 500 mA, f = 1805 MHz
and 1880 MHz, tone spacing = 100 kHz)
Third-order Intermodulation Distortion*
(V
DD
= 26 Vdc, P
OUT
= 60 W PEP, I
DQ
= 500 mA, f = 1805 MHz
and 1880 MHz, tone spacing = 100 kHz)
Input Return Loss
(V
DD
= 26 Vdc, P
OUT
= 60 W PEP, I
DQ
= 500 mA, f = 1805 MHz
and 1880 MHz, tone spacing = 100 kHz)
Output Power at 1 dB Gain Compression
(V
DD
= 26 V, P
OUT
= 60 W CW, f = 1880 MHz, I
DQ
= 500 mA)
Ruggedness
(V
DD
= 26 V, P
OUT
= 60 W CW, I
DQ
= 500 mA, f = 1880 MHz,
VSWR = 10:1 [all phase angles])
C
RSS
—
1.3
—
pF
Symbol
Min
Typ
Max
Unit
G
FS
V
GS(th)
V
GS(Q)
V
DS(on)
—
—
—
—
4.0
—
3.6
0.08
—
4.8
—
—
S
Vdc
Vdc
Vdc
V
(BR)DSS
I
GSS
I
DSS
65
—
—
—
—
—
—
1.8
5.5
Vdc
µAdc
µAdc
Symbol
Min
Typ
Max
Unit
Functional Tests (in Agere Systems Supplied Test Fixture)
G
PS
—
15
—
dB
η
—
41
—
%
IM3
—
–26
—
dBc
IRL
—
–10
—
dB
P1dB
Ψ
—
60
—
W
No degradation in output
power.
2
Agere Systems Inc.
Preliminary Data Sheet
April 2004
AGR18060E
60 W, 1805 MHz—1880 MHz, LDMOS RF Power Transistor
Test Circuit Illustrations for AGR18060E
R3
V
GG
R1
R2
C2
C1
C12
C13 C14
C3
Z6
2
1
3
C5
DUT
Z15
FB1
V
DD
C7
C8
C9
C10
Z1
RF INPUT
Z2
C4
Z3
Z4
Z5
Z7
Z8
Z9
Z10
Z11
Z12
Z13 C11 Z14
PINS
1. DRAIN
2. GATE
3. SOURCE
RF
OUTPUT
A. Schematic
Gate
Gnd
Drain
C2
R2
R1
R3
C12 C13 C14
C3
W1
C7
C8
C6
C9
FB1
C10
S2
C1
C4
2
S3
3
S4
1
C11
C5
S1
B. Component Layout
Parts List:
s
Microstrip line: Z1 0.065 in. x 0.283 in.; Z2 0.065 in. x 0.700 in.; Z3 0.065 in. x 0.308 in.; Z4 0.856 in.x 0.262 in.; Z5 1.045 in. x 0.140 in.;
Z6 0.051 in. x 0.470 in.; Z7 1.220 in. x 0.104 in.; Z8 0.998 in. x 0.422 in.; Z9 0.132 in. x 0.050 in.; Z10 0.984 in. x 0.093 in.;
Z11 0.132 in. x 0.244 in.; Z12 0.289 in. x 0.332 in.; Z13 0.132 in. x 0.200 in.; Z14 0.065 in. x 0.250 in.
®
s
ATC
B case chip capacitors: C3, C4: 10 pF, 100B100JCA500X; C11 8.2 pF 100B8R2JCA500X; C7 1000 pF, 100B102JCA500X.
®
s
Kemet
B case chip capacitors
:
C9, C12: 0.10 µF, CDR33BX104AKWS.
®
s
Johanson Giga-Trim
variable capacitors: C5, C17: 0.4 pF—2.5 pF.
®
s
Vitramon
1206:
C2, C8: 22000 pF.
®
s
Murata
0805:
C13 0.01 µF, GRM40X7R103K100AL.
s
0603:
C14 220 pF.
®
s
Fair-Rite
ferrite bead: FB1, #2743019447.
®
s
Sprague
tantalum, SMT: C1, C10: 22 µF, 35 V.
s
Fixed film
chip resistors:
R1 510
Ω,
1/4 W, 0.08 x 0.13; R2 560 kΩ, 1/4 W, 0.08 x 0.13; R3 4.7
Ω,
1/4 W, 0.08 x 0.13.
s
PCB etched circuit boards.
®
s
Taconic
ORCER RF-35: board material, 1 oz. copper, 30 mil thickness,
ε
r = 3.5.
Figure 2. AGR18060E Test Circuit Schematic
Agere Systems Inc.
3
AGR18060E
60 W, 1805 MHz—1880 MHz, LDMOS RF Power Transistor
Preliminary Data Sheet
April 2004
Typical Performance Characteristics
S
TOW
0.0
Ð
>
W
A
V
EL
E
N
GTH
170
0.49
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.6
1.8
2.0
3.0
4.0
5.0
10
20
0.0
Ð
D
L
OA
D
<
OW
A
R
7
±
180
HST
0.4
70
N
GT
-1
E
V
EL
WA
<Ð
-90
-160
50
RESISTANCE COMPONENT (R/Zo), OR CONDUCTANCE COMPONENT (G/Yo)
0.2
0.49
0.48
)
/
Yo
(-jB
CE
Z
L
0.6
-85
N
TA
EP
SC
4
0.0
50
-1
-80
U
ES
V
TI
UC
0.4
0.3
f1
R
6
D
-75
5
0.0
5
0.4
X/
40
-1
-70
06
0.
0.6
-60
1.6
0.7
1.4
0.8
0.9
1.0
1.2
5
-5
0
-5
5
-4
MHz (f)
1805 (f1)
1842.5 (f2)
1880 (f3)
Note:
Z
S
Ω
(Complex
Source Impedance)
1.76 – j4.18
1.78 – j3.78
1.78 – j3.65
Z
L
Ω
(Complex Optimum Load Impedance)
4.65 – j2.50
4.23 – j2.44
3.84 – j2.40
Z
L
was chosen based on trade-offs between gain, output power, drain efficiency, and intermodulation distortion.
GATE (2)
Z
S
DRAIN (1)
Z
L
SOURCE (3)
INPUT MATCH
DUT
OUTPUT MATCH
Figure 3. Series Equivalent Input and Output Impedances
4
Agere Systems Inc.
F
0.
32
18
0.
0
-5
-25
44
0
-65
.5
0.
3
0.3
0.1
7
-30
-60
1.8
2.
0
0.3
0.1
4
6
-3
-70
5
0.35
0.15
0.36
0.14
-80
-4
0
0.37
0.13
0.4
0.2
-90
0.12
0.38
0.11
-100
0.39
CA
P
A
0.1
0.4
-110
CI
T
IVE
RE
AC
TA
NC
EC
OM
0.0
0.4
9
1
-12
0
0.0
8
PO
N
0.4
2
EN
T
(-j
4
0.
-20
3.
O
),
Zo
0
0.6
Z
S
IN
-15
4.0
0.8
f3
5.0
1.
0.2
0
-10
8
0.
10
0.1
f3
f1
0.4
50
20
1.
0
0.6
0.4
Z
0
= 10
Ω
A
RD
U
CT
0.48
IN
D
90
0.
8
10
0.1
0.
07
-1
30
0.
43
0.25
0.26
0.24
0.27
0.23
0.25
0.24
0.26
0.23
0.27
REFL
ECTI
ON
COEFFI
CI
EN
T
I
N
D
EG
R
L
E
OF
EES
ANG
I
SSI
ON
COEFFI
CI
EN
T
I
N
TRA
N
SM
D
EGR
EES
20
L
E
OF
ANG
0.2
0.2
0.3
-4
0
50
-20
0.2
2
0.2
8
0.2
9
0.2
1
-30
0.
19
0.
31
Preliminary Data Sheet
April 2004
AGR18060E
60 W, 1805 MHz—1880 MHz, LDMOS RF Power Transistor
Typical Performance Characteristics
(continued)
80.00
70.00
60.00
50.00
40.00
30.00
20.00
10.00
0.00
0.00
P
OUT
-5.0
EFFICIENCY
IRL
-15.0
-20.0
4.50
-10.0
IRL, INPUT RETURN
Z
LOSSZ(dB)Z
0.0
P
OUT
, OUTPUT
POWERZ(WATTS),
EFFICIENCYZ(%)Z
0.50
1.00
1.50
2.00
2.50
3.00
3.50
4.00
P
IN
, INPUT POWER (WATTS)Z
TEST CONDITIONS:
V
DD
= 26 V, I
DQ
= 500 mA, FREQUENCY = 1842.5 MHz, CW MEASUREMENT.
Figure 4. Output Power and Efficiency vs. Input Power
G
PS
, POWER GAIN (dB)Z
16
I
DQ
= 700 mA
15
14
13
12
1
10
P
OUT
, OUTPUT POWER (WATTS)Z
100
I
DQ
= 500 mA
I
DQ
= 300 mA
TEST CONDITIONS:
V
DD
= 26 V, FREQUENCY = 1842.5 MHz, CW MEASUREMENT.
Figure 5. Power Gain vs. Output Power
G
PS
, POWER GAINZZ
(dB)Z
16
15
14
13
12
11
10
1760
1780
1800
1820
1840
1860
1880
IRL
G
PS
0
-5
-10
-15
-20
1900
IRL, INPUT
Z
RETURNZLOSS
(dB)ZZ
f, FREQUENCY (MHz)Z
TEST CONDITIONS:
V
DD
= 26 V, I
DQ
= 500 mA, P
IN
= 25 dBm, CW MEASUREMENT.
Figure 6. Gain and IRL vs. Signal Frequency
Agere Systems Inc.
5