VS1010d Datasheet
VS1010d - Mp3 Player IC with
USB and SD card Interfaces
Analog Hardware Features
•
•
•
•
•
Stereo 16-bit Mems Mic audio interface
Two 24-bit audio DACs
Stereo earphone driver for 30
Ω
load
12-bit ADC, 3-7 external inputs
Operation from single power supply,
three programmable internal regulators
Digital Hardware Features
PR
EL
Firmware and VSOS Features
Version: 0.11, 2019-06-24
•
75 MIPS VS_DSP
4
processor core
•
16 KiB instruction RAM (4 KiWord)
•
Up to 64 KiB virtual instruction RAM
using built-in translation lookaside buffer
•
64 KiB data RAM (2×16 KiWord)
•
USB 2.0 Hi-Speed (480 Mbit/s)
Device / Host
•
I2S and SPDIF digital audio interfaces
•
SD Card interface
•
2 SPI bus interfaces
•
2 UART interfaces
•
All digital pins are user configurable for
general purpose IO
•
Flexible clock selection, default opera-
tion from 12.288 MHz
•
Internal PLL clock multiplier for digital
logic
•
RTC
•
128-bit AES hardware decryption
•
Decoders: MP3, WAV PCM from ROM.
AAC, WMA, Ogg Vorbis with special soft-
ware (restrictions apply, see Chapter 6,
Supported Decoders and File Formats).
•
File I/O for SD cards
•
USB host and slave libraries
•
Extensive audio DSP library
•
Flexible boot options
•
Easy-to-write software interface with VSIDE
IM
IN
AR
•
•
•
•
•
Portable recorders
Digital docking stations
MP3 players
Wireless headphones
Audio co-processor
Applications
Overview
VS1010d is a flexible audio platform device.
It is built around VS_DSP
4
, which is a power-
ful DSP (Digital Signal Processor) core. The
digital interfaces provide flexible access to ex-
ternal devices in standalone applications and
flexible digital audio data inputs and outputs
when the device is used as an audio signal
processor in more complex systems. The ana-
log interfaces provide high-quality audio out-
puts, and the control ADC can be used for ex-
ample for interfacing a resistive touch panel.
Y
1
VS1010d Datasheet
Contents
VS1010d Front Page
Table of Contents
List of Figures
1 Disclaimer
2 Licenses
3 Definitions
CONTENTS
4 Characteristics & Specifications
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . .
Analog Characteristics of Audio Outputs . . . . . . . . . . . . . . . . . . . . . .
SAR Characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Characteristics of Regulators . . . . . . . . . . . . . . . . . . . . . . . .
Analog Characteristics of USB_VDD input . . . . . . . . . . . . . . . . . . . . .
Analog Characteristics of VHIGH voltage monitor . . . . . . . . . . . . . . . . .
Analog Characteristics of CVDD voltage monitor . . . . . . . . . . . . . . . . . .
Power Button Characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
PR
EL
4.11 Power Consumption
5 Package and Pin Descriptions
5.1
5.2
LQFP-48 Package
Version: 0.11, 2019-06-24
4.10 Digital Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.11.1 Digital Power Consumption . . . . . . . . . . . . . . . . . . . . . . . .
4.11.2 Analog Power Consumption . . . . . . . . . . . . . . . . . . . . . . .
4.11.3 I/O Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . .
4.11.4 Example Power Consumption . . . . . . . . . . . . . . . . . . . . . .
VS1010d LQFP-48 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . .
IM
IN
AR
2
6
7
7
7
8
8
9
10
11
11
12
12
12
12
12
13
13
13
14
14
15
15
16
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Y
1
VS1010d Datasheet
5.3
5.4
5.5
5.6
5.7
5.8
CONTENTS
18
20
VQFN-68 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VQFN-68 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VS1010d VQFN-68 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . .
VS1010d Boot Mode Options and Pins . . . . . . . . . . . . . . . . . . . . . . .
PCB Layout Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differencies Between LQFP-48 and VQFN-68 Package Options . . . . . . . . .
6 Supported Decoders and File Formats
6.1
6.2
File Formats Supported by Internal ROM Code . . . . . . . . . . . . . . . . . .
File Formats Supported by Loading Decoders into RAM . . . . . . . . . . . . .
7 Supported Music File Storage Media
8 Example Schematic
9 VS1010d General Description
9.1
VS1010d Internal Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.1.1
9.1.2
9.1.3
Regulator Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.2
Analog Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PR
EL
10 Oscillator and Reset Configuration
11 VS1010d Peripherals and Registers
11.1 The Processor Core
Version: 0.11, 2019-06-24
11.2 VS1010d Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.3 VS1010d Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.4 Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.4.1 Interrupt Controller Registers . . . . . . . . . . . . . . . . . . . . . .
11.4.2 Interrupt Enable INT_ENABLE[0/1]_[H/L]P . . . . . . . . . . . . . . .
11.4.3 Interrupt Origin INT_ORIGIN[0/1] . . . . . . . . . . . . . . . . . . . .
11.4.4 Interrupt Vector INT_VECTOR . . . . . . . . . . . . . . . . . . . . . .
IM
IN
AR
24
25
25
26
26
26
27
28
29
30
30
31
31
32
34
35
35
35
36
37
38
38
38
39
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Y
21
VS1010d Datasheet
CONTENTS
39
39
40
11.4.5 Interrupt Enable Counter INT_ENCOUNT . . . . . . . . . . . . . . .
11.4.6 Interrupt Global Disable INT_GLOB_DIS . . . . . . . . . . . . . . . .
11.4.7 Interrupt Global Enable INT_GLOB_ENA . . . . . . . . . . . . . . . .
11.5 PLL Clock Domain Control Registers . . . . . . . . . . . . . . . . . . . . . . . .
11.5.1 General Purpose Software Registers . . . . . . . . . . . . . . . . . .
11.5.2 Peripheral I/O Control . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.5.3 PLL Clock Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.6 XTALI Clock Domain Control Registers . . . . . . . . . . . . . . . . . . . . . . .
11.6.1 Analog Control Registers . . . . . . . . . . . . . . . . . . . . . . . . .
11.6.2 Regulator and Peripheral Clock Control Registers . . . . . . . . . . .
11.7 Audio Playback Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.7.1 Primary Audio Path 24-bit Sample Rate Upconverter with Filters:
DAC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.7.2 Primary Audio Path Volume Control . . . . . . . . . . . . . . . . . . .
11.7.3 Secondary Audio Path: DAOSET Registers . . . . . . . . . . . . . .
11.7.4 Filterless Sample Rate Converter (SRC) Registers . . . . . . . . . .
11.8 SPI Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9 Common Data Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.1 SD Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.9.2 SPI Slave Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . .
PR
EL
Version: 0.11, 2019-06-24
11.9.3 AES Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10 USB Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10.1 USB Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . .
11.10.2 USB Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10.3 USB Clocking Modes . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.10.4 USB Host . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.11 Interruptable General Purpose IO Ports 0-2 . . . . . . . . . . . . . . . . . . . .
11.12 S/PDIF Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.12.1 S/PDIF Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.12.2 S/PDIF Receiver Registers . . . . . . . . . . . . . . . . . . . . . . . .
IM
IN
AR
41
41
41
42
44
44
47
48
49
51
52
53
54
58
61
63
65
66
67
70
71
71
72
74
74
75
4
Y
VS1010d Datasheet
CONTENTS
78
11.12.3 S/PDIF Receiver Sample Rate Estimation . . . . . . . . . . . . . . .
11.12.4 S/PDIF Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.12.5 S/PDIF Transmitter Registers . . . . . . . . . . . . . . . . . . . . . .
11.13 UART (Universal Asynchronous Receiver/Transmitter) Peripheral . . . . . . . .
11.13.1 UART Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . .
11.14 Watchdog Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.14.1 Watchdog Registers . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.15 I2S Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.15.1 I2S Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . . .
11.16 Timer Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.16.1 Timer Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . .
11.17 Real Time Clock (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.17.1 RTC Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . .
11.18 12-Bit Successive Approximation Register Analog-to-Digital Converter (SAR) .
11.19 Mems Mic Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.20 Pulse Width Modulation Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12 Document Version Changes
13 Contact Information
PR
EL
Version: 0.11, 2019-06-24
IM
IN
AR
82
82
84
84
85
85
87
87
89
89
91
93
94
95
97
5
Y
78
79
LED专区
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
