FEATURES
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LT8650S
Dual Channel 4A, 42V,
Synchronous Step-Down Silent Switcher 2
with 6.2µA Quiescent Current
DESCRIPTION
The
LT
®
8650S
is a dual step-down regulator that delivers
up to 4A of continuous current from both channels and
supports loads up to 6A from each channel. The LT8650S
features the second generation Silent Switcher architecture
to minimize EMI emissions while delivering high efficiency
at high switching frequencies. This includes integration of
bypass capacitors to optimize high frequency current loops
and make it easy to achieve advertised EMI performance
by eliminating layout sensitivity.
The fast, clean, low-overshoot switching edges enable high
efficiency operation even at high switching frequencies,
leading to a small overall solution size. Peak current mode
control with a 40ns minimum on-time allows high step
down ratios at high switching frequencies.
Burst Mode operation features a 6.2μA quiescent current
resulting in high efficiency at low output currents, forced
continuous mode allows fixed switching frequency opera-
tion over the entire output load range, and spread spectrum
operation can further reduce EMI emissions. External VC
pins allow optimal loop compensation for fast transient
response. The VC pins can also be used for current sharing
and the CLKOUT pin enables synchronizing two LT8650S
chips to generate a 4-phase, 16A supply.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S patents, including 8823345.
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Silent Switcher
®
2 Architecture:
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Ultralow EMI on Any PCB
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Eliminates PCB Layout Sensitivity
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Internal Bypass Capacitors Reduce Radiated EMI
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Optional Spread Spectrum Modulation
4A DC from Each Channel Simultaneously
Up to 6A on Either Channel
Ultralow Quiescent Current BurstMode
®
Operation:
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6.2μA I Regulating 12V to 5V
Q
IN
OUT1
and 3.3V
OUT2
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Output Ripple <10mV
P-P
Optional External VC Pin: Fast Transient Response
and Current Sharing (Extra 50µA I
Q
/Channel)
Forced Continuous Mode
High Efficiency at High Frequency
94.6% Efficiency at 2A, 5V
OUT
from 12V
IN
at 2MHz
93.3% Efficiency at 4A, 5V
OUT
from 12V
IN
at 2MHz
Fast Minimum Switch-On Time: 40ns
Wide Input Voltage Range: 3.0V to 42V
Adjustable and Synchronizable: 300kHz to 3MHz
Small 4mm × 6mm 32-Pin LQFN Package
APPLICATIONS
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General Purpose Step-Down
Automotive and Industrial Supplies
TYPICAL APPLICATION
5V/4A, 3.3V/4A 2MHz Step-Down Converter
V
IN1
5.4V TO 42V
V
OUT1
5V
4A
4.7µF
1.0µH
47µF
×2
4.7pF
191k
1M
FB1
VCC
10nF
BIAS
RT
15k
f
SW
= 2MHz
VCC
GND SYNC
1µF
8650s TA01a
Efficiency
V
IN2
3.7V TO 42V
V
OUT2
3.3V
47µF 4A
×2
100
95
90
85
EFFICIENCY (%)
80
75
70
65
60
55
50
45
40
0
V
IN1
= V
IN2
= 12V
f
SW
= 2MHz
1
2
3
4
LOAD CURRENT (A)
CH1 5V
CH2 3.3V
5
6
V
IN1
EN/UV1
SW1
V
IN2
EN/UV2
SW2
1.0µH
4.7µF
1M
LT8650S
FB2
VC2
SS2
10nF
VCC
316k
4.7pF
VC1
SS1
8650s TA01b
Document Feedback
For more information
www.analog.com
1
Rev A
LT8650S
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW
VC2
SS2
SS1
VC1
27
26
33
GND
34
GND
25
24
23
35
GND
36
GND
22
BIAS
V
CC
BST1
SW1
SW1
FB2
FB1
28
V
IN1
, V
IN2
, EN/UV1, EN/UV2, PG1, PG2.....................42V
BIAS ..........................................................................30V
FB1, FB2, SS1, SS2 . ...................................................4V
VC1, VC2 ..................................................................3.5V
SYNC. .........................................................................6V
Operating Junction Temperature Range (Note 2)
LT8650SE .............................................. –40 to 125°C
LT8650SI ............................................... –40 to 125°C
Storage Temperature Range ......................–65 to 150°C
Maximum Reflow (Package Body)
Temperature...................................................... 260°C
32
RT
GND
1
2
31
30
29
V
IN1
V
IN1
4
5
V
IN2
V
IN2
7
8
37
GND
38
GND
20
19
18
17
11
EN1
12
EN2
13
TEMP
14
PG1
15
PG2
16
SYNC
SW2
SW2
BST2
CLKOUT
GND
10
LQFN PACKAGE
32-LEAD (6mm × 4mm × 0.94mm)
T
JMAX
= 125°C,
θ
JA
= 23°C/W
EXPOSED PAD (PINS 33, 34, 35, 36, 37, 38) ARE GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
PART NUMBER
LT8650SEV#PBF
LT8650SIV#PBF
PAD OR BALL FINISH
Au (RoHS)
http://www.linear.com/product/LT8650S#orderinfo
PART MARKING
DEVICE
8650SV
FINISH CODE
e4
PACKAGE**
TYPE
LQFN (Laminate Package
with QFN Footprint)
MSL
RATING
3
TEMPERATURE RANGE
(SEE NOTE 2)
–40°C to 125°C
–40°C to 125°C
• Device temperature grade is indicated by a label on the shipping container. • Recommended PCB Assembly and Manufacturing Procedures:
www.linear.com/umodule/pcbassembly
• Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking:
www.linear.com/leadfree
• Parts ending with PBF are RoHS and WEEE compliant.
• Package and Tray Drawings:
www.linear.com/packaging
**The LT8650S package has the same dimensions as a standard
6mm × 4mm QFN package
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C.
PARAMETER
Minimum Input Voltage
V
IN1
Quiescent Current in Shutdown V
EN/UV1
= V
EN/UV2
= 0V, V
SYNC
= 0V
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
l
TYP
2.6
1.7
3.7
MAX
3
4
8
8
16
120
140
UNITS
V
µA
µA
µA
µA
µA
µA
Rev A
V
IN1
+ V
CC
Quiescent Current in
Sleep with Internal Compensation
V
IN1
+ V
CC
Quiescent Current in
Sleep with External Compensation
V
EN/UV1
= V
EN/UV2
= 2V, V
FB1
= V
FB2
>0.8V, V
VC1
= V
VC2
= V
CC
,
V
SYNC
= 0V
V
EN/UV1
= V
EN/UV2
= 2V, V
FB1
= V
FB2
>0.8V, V
VC1
= V
VC2
= Float,
V
SYNC
= 0V
l
90
l
2
For more information
www.analog.com
LT8650S
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C.
PARAMETER
V
IN1
+ V
CC
Quiescent Current when
Active
V
IN
Current in Regulation
Feedback Reference Voltage
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
l
TYP
5
45
350
MAX
7
75
550
0.806
0.810
0.02
20
60
330
1.05
2.15
14
10.5
2
0.78
20
UNITS
mA
µA
µA
V
V
%/V
nA
ns
kHz
MHz
MHz
A
A
µA
V
mV
nA
%
%
%
nA
Ohm
V
V
V
µA
µA
Ω
mS
µA
µA
A/V
V
EN/UV1
= V
EN/UV2
= 2V, V
FB1
= V
FB2
>0.8V, V
VC1
= V
VC2
= V
CC
, V
SYNC
= 3.4V
V
IN
= 12V, V
OUT
= 3.3V, Output Load = 100µA, V
VC1
= V
VC2
= V
CC
, V
SYNC
= 0V
V
IN
= 12V, V
OUT
= 3.3V, Output Load = 1mA, V
VC1
= V
VC2
= V
CC
, V
SYNC
= 0V
0.794
0.790
–20
0.800
0.800
0.004
Feedback Voltage Line Regulation
Feedback Pin Input Current
Minimum On-Time
Oscillator Frequency
V
IN
= 4.0V to 36V
V
FB
= 0.8V
I
LOAD
= 3A, SYNC = 3.4V
R
T
= 133k
R
T
= 35.7k
R
T
= 15k
l
l
l
l
l
40
270
0.95
1.85
10
6.5
–2
300
1.0
2.00
12
8.5
0.74
30
Top Power NMOS Current Limit
Bottom Power NMOS Current Limit
SW Leakage Current
EN/UV Pin Threshold
EN/UV Pin Hysteresis
EN/UV Pin Current
V
EN
/UV = 2V
V
IN
= 42V, V
SW
= 0V,42V
EN/UV Falling
l
0.7
–20
PG Upper Threshold Offset from V
FB
V
FB
Falling
PG Lower Threshold Offset from V
FB
V
FB
Rising
PG Hysteresis
PG Leakage
PG Pull-Down Resistance
SYNC Threshold
V
PG
= 12V
V
PG
= 0.1V
SYNC DC and Clock Low Level Voltage
SYNC Clock High Level Voltage
SYNC DC High Level Voltage
V
SYNC
= 6V
l
l
5.5
–9.5
–40
7.5
–7.5
0.3
9
–6
40
l
600
0.4
1200
1.5
2.8
SYNC Pin Current
SS Source Current
SS Pull-Down Resistance
Error Amplifier Transconductance
VC Source Current
VC Sink Current
VC Pin to Switch Current Gain
TEMP Output Voltage
120
l
1.0
2.0
200
0.9
170
170
9.6
3.0
Fault Condition, SS = 0.1V
V
C
= 1.25V
V
FB
= 0.6V, V
VC
= 1.25V
V
FB
= 1.0V, V
VC
= 1.25V
I
TEMP
= 0µA, Temperature = 25°C
I
TEMP
= 0µA, Temperature = 125°C
190
1100
250
1200
310
1300
mV
mV
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LT8650SE is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT8650SI is guaranteed over the full –40°C to 125°C operating junction
temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated at junction temperatures greater
than 125°C. The junction temperature (T
J
, in °C) is calculated from the
ambient temperature (T
A
in °C) and power dissipation (P
D
, in Watts)
according to the formula:
T
J
= T
A
+ (P
D
•
θ
JA
) where
θ
JA
(in °C/W) is the package thermal
impedance.
Note 3:
This IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime
For more information
www.analog.com
3
Rev A
LT8650S
TYPICAL PERFORMANCE CHARACTERISTICS
100
95
90
85
EFFICIENCY (%)
80
75
70
65
60
55
50
45
40
0
1
12V
24V
36V
POWER LOSS
L = XFL5030, 1.0µH
2
3
4
LOAD CURRENT (A)
5
6
8650S G01
5V
OUT
Efficiency
f
SW
= 2MHz
FCM
EFFICIENCY
6.0
5.5
5.0
4.5
EFFICIENCY (%)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
POWER LOSS (W)
100
90
80
70
60
50
40
30
20
10
5V
OUT
Efficiency
f
SW
= 2MHz
BURST
FCM
12V
24V
36V
L = XFL5030, 1.0µH
1
10
100
1k
LOAD CURRENT (mA)
10k
8650S G02
0
0.1
100
95
90
85
EFFICIENCY (%)
80
75
70
65
60
55
50
45
40
3.3V
OUT
Efficiency
f
SW
= 2MHz
FCM
EFFICIENCY
6.0
5.5
5.0
4.5
EFFICIENCY (%)
4.0
POWER LOSS (W)
3.5
3.0
2.5
2.0
1.5
POWER LOSS 1.0
L = XFL5030, 1.0µH
0.5
6
8650S G03
100
90
80
70
60
50
40
30
20
10
3.3V
OUT
Efficiency
f
SW
= 2MHz
BURST
12V
24V
36V
FCM
12V
24V
36V
L = XFL5030, 1.0µH
1
10
100
1k
LOAD CURRENT (mA)
10k
8650S G04
0
1
2
3
4
LOAD CURRENT (A)
5
0
0
0.1
100
95
EFFICIENCY (%)
Efficiency at Different f
SW
100
95
Efficiency vs f
SW
Reference Voltage
0.810
0.808
REFERENCE VOLTAGE (V)
0.806
0.804
0.802
0.800
0.798
0.796
0.794
0.792
3
8650s G06
85
80
75
12V
IN
3.3V
OUT
L = IHLP2525EZ–01
1
1.5
0.5MHz 2.2µH
1MHz 1.5µH
2MHz 1.5µH
3MHz 1.5µH
4.5
5
EFFICIENCY (%)
90
90
85
80
75
12V
IN
3.3V
OUT
1.8A LOAD
L = IHLP2525EZ–01, 1.5µH
1
1.5
2
2.5
SWITCHING FREQUENCY (MHz)
70
0.5
2 2.5 3 3.5 4
LOAD CURRENT (A)
70
0.5
0.790
–55
–25
5
35
65
95
TEMPERATURE (°C)
125
155
8650s G05
8650S G07
4
Rev A
For more information
www.analog.com
LT8650S
TYPICAL PERFORMANCE CHARACTERISTICS
Load Regulation
0.40
0.30
CHANGE IN V
OUT
(%)
0.20
0.10
0.00
–0.10
–0.20
–0.30
–0.40
0
1
2
3
4
OUTPUT CURRENT (A)
5
CH1
CH2
6
8650S G08
Line Regulation
0.4
0.3
CHANGE IN V
OUT
(%)
0.2
0.1
0.0
–0.1
–0.2
–0.3
–0.4
0
5
10
15 20 25 30 35
INPUT VOLTAGE (V)
40
45
V
IN1
= V
IN2
I
OUT
= 0A
INPUT CURRENT (µA)
20
18
16
14
12
10
8
6
4
2
0
5
No Load Supply Current with
Internal Compensation
V
IN1
= V
IN2
V
OUT1
= 5V, V
OUT2
= 3.3V
IN REGULATION
SYNC = 0V, V
BIAS
= V
OUT2
V
IN1
= V
IN2
= 12V
V
OUT1
= 5V, V
OUT2
= 3.3V
FCM, f
SW
= 2MHz
BOTH CHANNELS ENABLED
ONLY CHANNEL 2 ENABLED
10
15
20
25
30
INPUT VOLTAGE (V)
35
40
8650S G09
8650S G10
No Load Supply Current with
External Compensation
160
140
INPUT CURRENT (µA)
120
100
80
60
40
20
0
5
10
15
20
25
30
INPUT VOLTAGE (V)
35
40
V
IN1
= V
IN2
V
OUT1
= 5V, V
OUT2
= 3.3V
IN REGULATION
SYNC = 0V
INPUT CURRENT (µA)
160
140
120
100
80
60
40
20
No Load Supply Current
V
IN1
= V
IN2
= 12V
V
OUT1
= 5V, V
OUT2
= 3.3V
V
BIAS
= V
OUT1
SYNC = 0V
CURRENT LIMIT (A)
–25
5
35
65
95
TEMPERATURE (°C)
125
155
16
14
12
10
8
6
4
2
Top FET Current Limit
0
–55
0
0.2
0.4
0.6
DUTY CYCLE
0.8
1
8650S G13
8650S G11
8650S G12
BOTH CHANNELS ENABLED, BIAS = FLOAT
ONLY CHANNEL 2 ENABLED, BIAS = FLOAT
BOTH CHANNELS ENABLED, BIAS = V
OUT2
ONLY CHANNEL 2 ENABLED, BIAS = V
OUT2
BOTH CHANNELS IN REGULATION
INTERNAL COMP
EXTERNAL COMP
Top FET Current Limit
16
14
CURRENT LIMIT (A)
CURRENT LIMIT (A)
12
10
8
6
4
2
–55
–25
5
35
65
95
TEMPERATURE (°C)
125
155
30% DC
11
10
9
Bottom FET Current Limit
500
450
400
SWITCH V
DS
(mV)
350
300
250
200
150
100
50
–25
5
35
65
95
TEMPERATURE (°C)
125
155
0
Switch V
DS
8
7
6
5
4
3
2
1
–55
TOP FET
BOT FET
0
1
2
I
DS
(A)
3
4
5
8650S G16
8650S G14
8650S G15
For more information
www.analog.com
5
Rev A
单片机
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