TDC-GPX2
4-Channel Time-to-Digital Converter
General Description
The GPX2 is a high performance time-to-digital converter (TDC)
frontend device.
Highest measurement performance and highest data
throughput is achieved with LVDS stop inputs and LVDS serial
outputs for each channel. Current saving operation is also
possible with CMOS inputs and SPI readout.
High configuration flexibility and unlimited measurement
range cover many applications. They range from portable
handheld laser range equipment to ambitious time-of-flight
measurements of highest performance, as e.g. done in medical
imaging applications.
GPX2 operates without any locked loop technologies. GPX2
calculates all stop measurements inside, proportional to the
applied reference clock. Combinations of best single shot
accuracy of 10ps with lowest pulse-to-pulse spacing <5ns and
maximum data throughput rate of 70MSPS per stop input are
possible.
Figure 1:
Time Interval Measurements
REFCLK
#1
T-REF
#2
STOP
T1
T2
T3
Ordering Information
and
Content Guide
appear at end of
datasheet.
ams Datasheet
[v1-03] 2017-Dec-18
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TDC-GPX2 −
General Description
Key Benefits & Features
The benefits and features of this device are listed below:
Figure 2:
Added Value of Using TDC-GPX2
Benefits
Features
•
4 stop channels with serial
• 20ns pulse-to-pulse spacing
• Maximum 35MSPS
•
2 combined channels with
• 5ns pulse-to-pulse spacing
• Maximum 70MSPS
•
Single shot accuracy
• 20ps rms single shot resolution per channel
• 10ps rms with high resolution option
•
Unlimited measuring range 0s to 16s
•
Differential reference clock input 2MHz to 12.5MHz,
optional with quartz
•
Inputs optional with LVDS or CMOS level
•
Readout with LVDS or SPI
•
16-stage FIFO per channel
•
Automatic calibration to reference clock (no PLL or DLL)
•
SPI compatible 4-wire interface for configuration
•
•
•
•
Supply voltage 3.3V
Power dissipation 60mW to 450mW
Standby current 60μA
QFN64 (9mm x 9mm) or QFP64 (12mm x 12mm)
•
Simple data post-processing thanks to
calibrated results
•
Event assignment thanks to reference clock
index simplifies coincidence measurements
•
Easy pulse width measurements
•
High efficiency thanks high sample rate
•
Compact design thanks to small package
and low number of external components
•
Reduced cooling thanks to low power
consumption
Applications
•
Automated Test Equipment
•
Laser Range Measurement
•
Medical Imaging
•
Time-of-Flight Measurement
•
Particle Physics
•
Lidar, Radar, Sonar
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ams Datasheet
[v1-03] 2017-Dec-18
TDC-GPX2 −
General Description
Block Diagram
The functional blocks of this device are shown below:
Figure 3:
Functional Blocks of TDC-GPX2
CVDD18
DVDD18
TVDD18
DVDD18
DVDD33
TVDD33
DISABLEP
LCLKINP
LCLKINN
DISABLEN
STOP1P
STOP1N
TDC
FIFO
Encoder
Serializer
44:1 ... 14:1
SDO1P
SDO1N
FRAME1P
FRAME1N
SDO3P
SDO3N
FRAME3P
FRAME3N
SDO2P
SDO2N
FRAME2P
FRAME2N
SDO4P
SDO4N
FRAME4P
FRAME4N
STOP3P
STOP3N
TDC
FIFO
Encoder
Serializer
44:1 ... 14:1
STOP2P
STOP2N
TDC
FIFO
Encoder
Serializer
44:1 ... 14:1
STOP4P
STOP4N
TDC
FIFO
Encoder
Serializer
44:1 ... 14:1
RSTIDXP
RSTIDXN
Reference
Clock
Index
Counter
Encoder
Configuration
LVR
LCLKOUTP
LCLKOUTN
CVDD18O
REFCLKP
REFCLKN
TDC
TVDD18O
DVDD18O
Serial Interface
INTERRUPT
DVDD33
REFOSCI
ams Datasheet
[v1-03] 2017-Dec-18
REFOSCO
RVDD33
SCK
MISO
PARITY
SSN
MOSI
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TDC-GPX2 −
Pin Assignments
Pin Assignments
The TDC-GPX2 is shipped in QFN64 or QFP64 plastic packages
with the following pin assignment.
Pin Diagram
Figure 4:
Pin Diagram of TDC-GPX2
DISABLEN
DISABLEP
REFCLKN
REFCLKP
RSTIDXN
RSTIDXP
STOP2N
STOP1N
STOP3N
STOP4N
STOP1P
STOP3P
STOP2P
48
TVDD33
49
33
32
TVDD33
STOP4P
TVDD33
TGND
TGND
TVDD18
REFOSCI
REFOSCO
PARITY
TGND
TVDD18
CVDD18
CGND
RGND
INTERRUPT
SSN
CVDD18O
SCK
MOSI
MISO
DVDD18
DVDD33
DGND
LCLKINP
64
1
TDC-GPX2
TVDD18O
DVDD18O
RVDD33
DVDD18
DGND
DVDD33
DGND
LCLKOUTP
LCLKINN
17
16
LCLKOUTN
SDO1N
FRAME3N
FRAME1N
FRAME2P
FRAME2N
FRAME4N
FRAME1P
FRAME3P
SDO3N
FRAME4P
SDO4N
SDO2N
SDO3P
SDO1P
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SDO2P
SDO4P
ams Datasheet
[v1-03] 2017-Dec-18
TDC-GPX2 −
Pin Assignments
Pin Description
Figure 5:
Pin Description of TDC-GPX2
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19, 21, 62
20, 61
22, 60
23
24
25
26
27
28
Pin Name
FRAME1N
FRAME1P
SDO1N
SDO1P
FRAME2N
FRAME2P
SDO2N
SDO2P
FRAME3N
FRAME3P
SDO3N
SDO3P
FRAME4N
FRAME4P
SDO4N
SDO4P
LCLKOUTN
LCLKOUTP
DGND
DVDD33
DVDD18
RVDD33
DVDD18O
TVDD18O
CVDD18O
RGND
CGND
Description
Negative frame signal of stop channel 1
Positive frame signal of stop channel 1
Negative serial data output of stop channel 1
Positive serial data output of stop channel 1
Negative frame signal of stop channel 2
Positive frame signal of stop channel 2
Negative serial data output of stop channel 2
Positive serial data output of stop channel 2
Negative frame signal of stop channel 3
Positive frame signal of stop channel 3
Negative serial data output of stop channel 3
Positive serial data output of stop channel 3
Negative frame signal of stop channel 4
Positive frame signal of stop channel 4
Negative serial data output of stop channel 4
Positive serial data output of stop channel 4
Negative serial clock output
Positive serial clock output
Ground for digital and IO units
3.3V supply for digital and IO units
1.8V supply for digital and IO units
3.3V supply for linear voltage regulator
1.8V supply voltage for digital and IO units
1.8V supply voltage for time frontend
1.8V supply voltage for time digital converter
Ground for linear voltage regulator
Ground for TDC
Type
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
LVDS Output
Power Supply
Power Supply
Power Supply
Power Supply
Regulator Out
Regulator Out
Regulator Out
Power Supply
Power Supply
Not Used
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
ams Datasheet
[v1-03] 2017-Dec-18
Page 5
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