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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT42
BCD to decimal decoder (1-of-10)
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
BCD to decimal decoder (1-of-10)
FEATURES
•
Mutually exclusive outputs
•
1-of-8 demultiplexing capability
•
Outputs disabled for input codes above nine
•
Output capability: standard
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT42 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
74HC/HCT42
The 74HC/HCT42 decoders accept four active HIGH BCD
inputs and provide 10 mutually exclusive active LOW
outputs. The active LOW outputs facilitate addressing
other MSI circuits with active LOW input enables.
The logic design of the “42” ensures that all outputs are
HIGH when binary codes greater than nine are applied to
the inputs.
The most significant input (A
3
) produces an useful inhibit
function when the “42” is used as a 1-of-8 decoder. The A
3
input can also be used as the data input in an 8-output
demultiplexer application.
TYPICAL
SYMBOL
t
PHL
/ t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay A
n
to Y
n
input capacitance
power dissipation capacitance per package
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
14
3.5
37
HCT
17
3.5
37
ns
pF
pF
UNIT
December 1990
2
Philips Semiconductors
Product specification
BCD to decimal decoder (1-of-10)
PIN DESCRIPTION
PIN NO.
1, 2, 3, 4, 5, 6, 7, 9, 10, 11
8
15, 14, 13, 12
16
SYMBOL
Y
0
to Y
9
GND
A
0
to A
3
V
CC
74HC/HCT42
NAME AND FUNCTION
multiplexer outputs
ground (0 V)
data inputs
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
BCD to decimal decoder (1-of-10)
FUNCTION TABLE
INPUTS
A
3
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
Note
1. H = HIGH voltage level
L = LOW voltage level
A
2
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
A
1
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A
0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Y
0
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Y
1
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Y
2
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
Y
3
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
74HC/HCT42
OUTPUTS
Y
4
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
Y
5
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
Y
6
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
Y
7
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
Y
8
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
Y
9
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
Fig.4 Functional diagram.
Fig.5 Logic diagram.
December 1990
4
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