74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
Rev. 9 — 13 August 2018
Product data sheet
1. General description
The 74LVC2T45; 74LVCH2T45 are dual bit, dual supply translating transceivers with 3-state
outputs that enable bidirectional level translation. They feature two 2-bits input-output ports
(nA and nB), a direction control input (DIR) and dual supply pins (V
CC(A)
and V
CC(B)
). Both V
CC(A)
and V
CC(B)
can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable
for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V).
Pins nA and DIR are referenced to V
CC(A)
and pins nB are referenced to V
CC(B)
. A HIGH on DIR
allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.
The devices are fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at GND level, both A port and
B port are in the high-impedance OFF-state.
Active bus hold circuitry in the 74LVCH2T45 holds unused or floating data inputs at a valid logic
level.
2. Features and benefits
•
Wide supply voltage range:
•
V
CC(A)
: 1.2 V to 5.5 V
•
V
CC(B)
: 1.2 V to 5.5 V
High noise immunity
Complies with JEDEC standards:
•
JESD8-7 (1.2 V to 1.95 V)
•
JESD8-5 (1.8 V to 2.7 V)
•
JESD8C (2.7 V to 3.6 V)
•
JESD36 (4.5 V to 5.5 V)
ESD protection:
•
HBM JESD22-A114F Class 3A exceeds 4000 V
•
MM JESD22-A115-A exceeds 200 V
•
CDM JESD22-C101E exceeds 1000 V
Maximum data rates:
•
420 Mbps (3.3 V to 5.0 V translation)
•
210 Mbps (translate to 3.3 V))
•
140 Mbps (translate to 2.5 V)
•
75 Mbps (translate to 1.8 V)
•
60 Mbps (translate to 1.5 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
±24 mA output drive (V
CC
= 3.0 V)
Inputs accept voltages up to 5.5 V
Low power consumption: 16 μA maximum I
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
•
•
•
•
•
•
•
•
•
•
•
•
Nexperia
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74LVC2T45DC
74LVCH2T45DC
74LVC2T45GT
74LVCH2T45GT
74LVC2T45GF
74LVCH2T45GF
74LVC2T45GM
74LVCH2T45GM
74LVC2T45GN
74LVCH2T45GN
74LVC2T45GS
74LVCH2T45GS
-40 °C to +125 °C
XSON8
-40 °C to +125 °C
XSON8
-40 °C to +125 °C
XQFN8
-40 °C to +125 °C
XSON8
-40 °C to +125 °C
XSON8
-40 °C to +125 °C
VSSOP8
Description
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
plastic extremely thin small outline package;
no leads; 8 terminals; body 1 × 1.95 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1 × 0.5 mm
plastic, extremely thin quad flat package;
no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.2 × 1.0 × 0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1.0 × 0.35 mm
Version
SOT765-1
SOT833-1
SOT1089
SOT902-2
SOT1116
SOT1203
4. Marking
Table 2. Marking
Type number
74LVC2T45DC
74LVCH2T45DC
74LVC2T45GT
74LVCH2T45GT
74LVC2T45GF
74LVCH2T45GF
74LVC2T45GM
74LVCH2T45GM
74LVC2T45GN
74LVCH2T45GN
74LVC2T45GS
74LVCH2T45GS
[1]
Marking code
[1]
V45
X45
V45
X45
V5
X5
V45
X45
V5
X5
V5
X5
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
74LVC_LVCH2T45
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 9 — 13 August 2018
2 / 34
Nexperia
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
5. Functional diagram
DIR
1A
5
DIR
2
1A
7
3
1B
1B
2A
2A
6
V
CC(A)
V
CC(B)
001aag577
2B
V
CC(A)
V
CC(B)
001aag578
2B
Fig. 1.
Logic symbol
Fig. 2.
Logic diagram
6. Pinning information
6.1. Pinning
74LVC2T45
74LVCH2T45
V
CC(A)
1A
2A
GND
1
2
3
4
001aai904
8
7
6
5
V
CC(B)
1B
2B
DIR
Fig. 3.
Pin configuration SOT765-1 (VSSOP8)
74LVC2T45
74LVCH2T45
terminal 1
index area
V
CC(B)
1
8
74LVC2T45
74LVCH2T45
V
CC(A)
1
8
V
CC(B)
1B
7
V
CC(A)
1A
2
7
1B
2B
2
6
1A
2A
3
6
2B
DIR
3
5
2A
GND
4
5
DIR
001aai905
GND
4
001aai906
Transparent top view
Fig. 4.
Pin configuration SOT833-1, SOT1089, SOT1116
and SOT1203 (XSON8)
Fig. 5.
Transparent top view
Pin configuration SOTSOT902-2 (XQFN8)
74LVC_LVCH2T45
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 9 — 13 August 2018
3 / 34
Nexperia
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
6.2. Pin description
Table 3. Pin description
Symbol
Pin
SOT765-1, SOT833-1, SOT1089,
SOT1116 and SOT1203
V
CC(A)
1A
2A
GND
DIR
2B
1B
V
CC(B)
1
2
3
4
5
6
7
8
SOT902-2
7
6
5
4
3
2
1
8
supply voltage A (port A and DIR)
data input or output
data input or output
ground (0 V)
direction control
data input or output
data input or output
supply voltage B (port B)
Description
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Supply voltage
V
CC(A)
, V
CC(B)
1.2 V to 5.5 V
1.2 V to 5.5 V
GND
[2]
[1]
[2]
Input
DIR
L
H
X
Input/output
[1]
nA
nA = nB
input
Z
nB
input
nB = nA
Z
The input circuit of the data I/O is always active.
When either V
CC(A)
or V
CC(B)
is at GND level, the device goes into suspend mode.
74LVC_LVCH2T45
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 9 — 13 August 2018
4 / 34
Nexperia
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC(A)
V
CC(B)
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
[4]
Conditions
Min
-0.5
-0.5
Max
+6.5
+6.5
-
+6.5
-
+6.5
±50
100
-
+150
250
Unit
V
V
mA
V
mA
V
mA
mA
mA
°C
mW
supply voltage A
supply voltage B
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
= -40 °C to +125 °C
[4]
V
O
< 0 V
Active mode
Suspend or 3-state mode
V
O
= 0 V to V
CCO
I
CC(A)
or I
CC(B)
[1][2][3]
[1]
[2]
V
I
< 0 V
[1]
-50
-0.5
-50
-0.5
-0.5
-
-
-100
-65
-
V
CCO
+ 0.5 V
The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
V
CCO
is the supply voltage associated with the output port.
V
CCO
+ 0.5 V should not exceed 6.5 V.
For VSSOP8 packages: above 110 °C the value of P
tot
derates linearly with 8.0 mW/K.
For XSON8 and XQFN8 packages: above 118 °C the value of P
tot
derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter
Conditions
V
CC(A)
V
CC(B)
V
I
V
O
T
amb
Δt/ΔV
supply voltage A
supply voltage B
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CCI
= 1.2 V
V
CCI
= 1.4 V to 1.95 V
V
CCI
= 2.3 V to 2.7 V
V
CCI
= 3 V to 3.6 V
V
CCI
= 4.5 V to 5.5 V
[1]
[2]
V
CCO
is the supply voltage associated with the output port.
V
CCI
is the supply voltage associated with the input port.
Min
1.2
1.2
0
Max
5.5
5.5
5.5
V
CCO
5.5
+125
20
20
20
10
5
Unit
V
V
V
V
V
°C
ns/V
ns/V
ns/V
ns/V
ns/V
Active mode
Suspend or 3-state mode
[1]
0
0
-40
[2]
-
-
-
-
-
74LVC_LVCH2T45
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 9 — 13 August 2018
5 / 34
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