IRF740LC, SiHF740LC
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Ω)
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
39
10
19
Single
D
FEATURES
400
0.55
•
•
•
•
•
•
•
Ultra Low Gate Charge
Reduced Gate Drive Requirement
Enhanced 30 V V
GS
Rating
Reduced C
iss
, C
oss
, C
rss
Extremely High Frequency Operation
Repetitive Avalanche Rated
Compliant to RoHS Directive 2002/95/EC
Available
RoHS*
COMPLIANT
DESCRIPTION
This new series of low charge Power MOSFETs achieve
significantly lower gate charge over conventional MOSFETs.
Utilizing the new LCDMOS technology, the device
improvements are achieved without added product cost,
allowing for reduced gate drive requirements and total
system savings. In addition, reduced switching losses and
improved efficiency are achievable in a variety of high
frequency applications. Frequencies of a few MHz at high
current are possible using the new Low Charge MOSFETs.
These device improvements combined with the proven
ruggedness and reliability that are characteristic of Power
MOSFETs ofter the designer a new standard in power
transistors for switching applications.
TO-220AB
G
G
D
S
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
TO-220AB
IRF740LCPbF
SiHF740LC-E3
IRF740LC
SiHF740LC
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Linear Derating Factor
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche Energy
a
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
Current
a
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
LIMIT
400
± 30
10
6.3
32
1.0
520
10
13
125
4.0
- 55 to + 150
300
d
10
1.1
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
T
C
= 25 °C
for 10 s
6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 9.1 mH, R
g
= 25
Ω,
I
AS
= 10 A (see fig. 12).
c. I
SD
≤
10 A, dI/dt
≤
120 A/μs, V
DD
≤
V
DS
, T
J
≤
150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91053
S11-0507-Rev. B, 21-Mar-11
www.vishay.com
1
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740LC, SiHF740LC
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thCS
R
thJC
TYP.
-
0.50
-
MAX.
62
-
1.0
°C/W
UNIT
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
DS
= 400 V, V
GS
= 0 V
V
DS
= 320 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 6.0 A
b
V
DS
= 50 V, I
D
= 6.0 A
b
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
I
D
= 10 A, V
DS
= 320 V
see fig. 6 and 13
b
400
-
2.0
-
-
-
-
3.0
-
0.76
-
-
-
-
-
-
-
-
4.0
± 100
25
250
0.55
-
V
V/°C
V
nA
μA
Ω
S
-
-
-
-
1100
190
18
-
-
-
11
31
25
20
4.5
7.5
-
-
-
39
10
19
-
-
-
-
-
nH
-
ns
nC
pF
V
GS
= 10 V
-
-
-
V
DD
= 200 V, I
D
= 10 A ,
R
g
= 9.1
Ω,
R
D
= 20
Ω,
see fig. 10
b
-
-
-
Between lead,
6 mm (0.25") from
package and center of
die contact
D
-
-
G
S
-
-
-
-
-
-
-
-
380
2.8
10
A
32
2.0
570
4.2
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 10 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 10 A, dI/dt = 100 A/μs
b
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
≤
300 μs; duty cycle
≤
2 %.
www.vishay.com
2
Document Number: 91053
S11-0507-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740LC, SiHF740LC
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
10
1
I
D
, Drain Current (A)
I
D
, Drain Current (A)
10
0
V
GS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
Top
4.5 V
10
1
150
°
C
10
0
25
°
C
10
-1
10
-1
10
-2
10
-2
91053_01
20 µs Pulse Width
T
C
=
25 °C
10
-1
10
0
10
1
91053_03
10
-2
4
5
6
7
20 µs Pulse Width
V
DS
=
50 V
8
9
10
V
DS
, Drain-to-Source Voltage (V)
V
GS,
Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
10
1
I
D
, Drain Current (A)
10
0
V
GS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
3.0
2.5
2.0
1.5
1.0
0.5
I
D
= 10 A
V
GS
= 10 V
4.5 V
10
-1
10
-2
10
-2
91053_02
20 µs Pulse Width
T
C
=
150 °C
10
-1
10
0
10
1
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
V
DS,
Drain-to-Source Voltage (V)
91053_04
T
J,
Junction Temperature (°C)
Fig. 2 - Typical Output Characteristics, T
C
= 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91053
S11-0507-Rev. B, 21-Mar-11
www.vishay.com
3
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740LC, SiHF740LC
Vishay Siliconix
2000
1600
C
iss
I
SD
, Reverse Drain Current (A)
Capacitance (pF)
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
150
°
C
10
1
25
°
C
1200
C
oss
800
400
C
rss
0
10
0
91053_05
10
1
10
0
0.6
91053_07
V
GS
= 0 V
0.8
1.0
1.2
1.4
1.6
1.8
V
DS,
Drain-to-Source Voltage (V)
V
SD
, Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
V
GS
, Gate-to-Source Voltage (V)
I
D
= 11 A
V
DS
= 320 V
10
3
5
2
Operation in this area limited
by R
DS(on)
I
D
, Drain Current (A)
16
V
DS
= 200 V
V
DS
= 80 V
10
2
5
2
12
10
µs
100
µs
1
ms
10
ms
T
C
= 25
°C
T
J
= 150
°C
Single Pulse
1
2
5
10
5
2
8
1
5
2
4
For test circuit
see figure 13
0
0
91053_06
0.1
10
6
12
18
24
30
36
42
91053_08
2
5
10
2
2
5
10
3
Q
G
, Total Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
www.vishay.com
4
Document Number: 91053
S11-0507-Rev. B, 21-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF740LC, SiHF740LC
Vishay Siliconix
R
D
V
DS
V
GS
D.U.T.
+
-
V
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
10
R
G
I
D
, Drain Current (A)
8
6
Fig. 10a - Switching Time Test Circuit
4
2
V
DS
90 %
0
25
91053_09
50
75
100
125
150
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
T
C
, Case Temperature (°C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
0
−
0.5
P
DM
0.2
0.1
0.1
0.05
0.02
0.01
10
-2
10
-5
10
-4
10
-3
10
-2
0.1
Single Pulse
(Thermal Response)
t
1
t
2
Notes:
1. Duty Factor, D = t
1
/t
2
2. Peak T
j
= P
DM
x Z
thJC
+ T
C
1
10
91053_11
t
1
, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91053
S11-0507-Rev. B, 21-Mar-11
www.vishay.com
5
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Linux开发
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
