PD - 91414C
IRLMS6702
HEXFET
®
Power MOSFET
l
l
l
l
Generation V Technology
Micro6 Package Style
Ultra Low
R
DS(on)
P-Channel MOSFET
D
1
6
A
D
V
DSS
= -20V
D
2
5
D
Description
Fifth Generation HEXFET
®
power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance
per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET
®
power MOSFETs are well known for,
provides the designer with an extremely efficient and
reliable device for use in a wide variety of applications.
The Micro6 package with its customized leadframe
produces a HEXFET
®
power MOSFET with R
DS(on)
60% less than a similar size SOT-23. This package is
ideal for applications where printed circuit board space
is at a premium. It's unique thermal design and R
DS(on)
reduction enables a current-handling increase of
nearly 300% compared to the SOT-23.
G
3
4
S
R
DS(on)
= 0.20Ω
Top View
Micro6
Absolute Maximum Ratings
Parameter
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
V
GS
dv/dt
T
J,
T
STG
Continuous Drain Current, V
GS
@ -4.5V
Continuous Drain Current, V
GS
@ -4.5V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Max.
-2.4
-1.9
-13
1.7
13
± 12
5.0
-55 to + 150
Units
A
W
mW/°C
V
V/ns
°C
Thermal Resistance Ratings
R
θJA
Maximum Junction-to-Ambient
Parameter
Min.
Typ.
Max
75
Units
°C/W
www.irf.com
1
3/18/04
IRLMS6702
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
-20
-0.70
1.5
Typ. Max. Units
Conditions
V
V
GS
= 0V, I
D
= -250µA
-0.005 V/°C Reference to 25°C, I
D
= -1mA
0.200
V
GS
= -4.5V, I
D
= -1.6A
Ω
0.375
V
GS
= -2.7V, I
D
= -0.80A
V
V
DS
= V
GS
, I
D
= -250µA
S
V
DS
= -10V, I
D
= -0.80A
-1.0
V
DS
= -16V, V
GS
= 0V
µA
-25
V
DS
= -16V, V
GS
= 0V, T
J
= 125°C
-100
V
GS
= -12V
nA
100
V
GS
= 12V
5.8 8.8
I
D
= -1.6A
1.8 2.6
nC V
DS
= -16V
2.1 3.1
V
GS
= -4.5V, See Fig. 6 and 9
13
V
DD
= -10V
20
I
D
= -1.6A
ns
21
R
G
= 6.0Ω
18
R
D
= 6.1Ω, See Fig. 10
210
V
GS
= 0V
130
pF
V
DS
= -15V
73
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Min. Typ. Max. Units
25
15
-1.7
-13
-1.2
37
22
V
ns
nC
A
Conditions
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= -1.6A, V
GS
= 0V
T
J
= 25°C, I
F
= -1.6A
di/dt = -100A/µs
D
S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width
≤
300µs; duty cycle
≤
2%.
Surface mounted on FR-4 board, t
≤
5sec.
I
SD
≤
-1.6A, di/dt
≤
-100A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
150°C
2
www.irf.com
IRLMS6702
100
VGS
TOP
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM -1.75V
100
-I D , Drain-to-Source Current (A)
10
-ID , Drain-to-Source Current (A)
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM -1.75V
TOP
10
1
1
-1.75V
-1.75V
0.1
0.1
1
20µs PULSE WIDTH
T
J
= 25°C
A
10
0.1
0.1
1
20µs PULSE WIDTH
T
J
= 150°C
10
A
-VDS , Drain-to-Source Voltage (V)
-V , Drain-to-Source Voltage (V)
DS
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.0
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= -1.6A
-I
D
, Drain-to-Source Current (A)
1.5
10
T
J
= 25°C
T
J
= 150°C
1
1.0
0.5
0.1
1.5
2.0
2.5
3.0
V
DS
= -10V
20µs PULSE WIDTH
3.5
4.0
4.5
5.0
A
0.0
-60
-40
-20
0
20
40
60
80
V
GS
= -4.5V
100 120 140 160
A
-V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
www.irf.com
3
IRLMS6702
400
-V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
10
I
D
= -1.6A
V
DS
= -16V
8
C, Capacitance (pF)
300
C
iss
C
oss
200
6
4
C
rss
100
2
0
1
10
100
A
0
0
2
4
FOR TEST CIRCUIT
SEE FIGURE 9
6
8
10
A
-V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
-I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10
-I
D
, Drain Current (A)
10
100µs
T
J
= 150°C
T
J
= 25°C
1
1ms
1
10ms
0.1
0.4
0.6
0.8
1.0
V
GS
= 0V
1.2
A
0.1
1
T
A
= 25°C
T
J
= 150°C
Single Pulse
10
1.4
A
100
-V
SD
, Source-to-Drain Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
www.irf.com
IRLMS6702
V
DS
R
D
-4.5V
Q
GS
V
G
Q
G
Q
GD
R
G
V
GS
D.U.T.
+
-4.5V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Charge
Fig 9a.
Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
Fig 10a.
Switching Time Test Circuit
t
d(on)
t
r
t
d(off)
t
f
50KΩ
12V
.2µF
.3µF
V
GS
10%
+
D.U.T.
-
V
DS
V
GS
-3mA
90%
I
G
I
D
V
DS
Current Sampling Resistors
Fig 9b.
Gate Charge Test Circuit
100
D = 0.50
Fig 10b.
Switching Time Waveforms
Thermal Response (Z
thJA
)
0.20
10
0.10
0.05
0.02
1
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJA
+ T
A
0.0001
0.001
0.01
0.1
1
10
100
P
DM
t
1
t
2
0.1
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
www.irf.com
-
V
DD
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
