LTM4678
Dual 25A or Single 50A µModule Regulator
with Digital Power System Management
FEATURES
Dual Digitally Adjustable Analog Loops with Digital
Interface for Control and Monitoring
n
Wide Input Voltage Range: 4.5V to 16V
n
Output Voltage Range: 0.5V to 3.3V
n
±0.5% Maximum DC Output Error Over Temperature
n
±5% Current Readback Accuracy
n
Sub-Milliohm DCR Current Sensing
n
Integrated Input Current Sense Amplifier
n
400kHz PMBus-Compliant I
2
C Serial Interface
n
Supports Telemetry Polling Rates up to 125Hz
n
Integrated 16-Bit
∆
Σ
ADC
n
Constant Frequency Current Mode Control
n
Parallel and Current Share Up to 250A
n
16mm × 16mm × 5.86mm CoP-BGA Package
Readable Data:
n
Input and Output Voltages, Currents, and Temperatures
n
Running Peak Values, Uptime, Faults and Warnings
n
Onboard EEPROM Fault Log Record
Writable Data and Configurable Parameters:
n
Output Voltage, Voltage Sequencing and Margining
n
Digital Soft-Start/Stop Ramp, Program Analog Loop
n
OV/UV/OT, UVLO, Frequency and Phasing
n
DESCRIPTION
The
LTM
®
4678
is a dual 25A or single 50A step-down
µModule
®
(power module) DC/DC regulator featuring
remote configurability and telemetry-monitoring of power
management parameters over PMBus—an
open standard
I
2
C-based digital interface protocol . The LTM4678
is comprised of digitally programmable analog control
loops, precision mixed-signal circuitry, EEPROM, power
MOSFETs, inductors and supporting components.
The LTM4678’s 2-wire serial interface allows outputs to
be margined, tuned and ramped up and down at program-
mable slew rates with sequencing delay times. True input
current sense, output currents and voltages, output power,
temperatures, uptime and
peak values
are readable. Custom
configuration of the EEPROM contents is not required. At
start-up, output voltages, switching frequency, and channel
phase angle assignments can be set by pin-strapping resis-
tors. The
LTpowerPlay
®
GUI and DC1613 USB-to-PMBus
converter and
demo kits
are available.
The LTM4678 is offered in a 16mm × 16mm × 5.86mm
CoP-BGA package available with SnPb or RoHS compliant
terminal finish.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6144194, 6177787, 6580258,
7420359, 8163643. Licensed under U.S. Patent 7000125 and other related patents worldwide.
APPLICATIONS
n
System Optimization, Characterization and Data Min-
ing in Prototype, Production and Field Environments
TYPICAL APPLICATION
(FROM
4.5V TO 5.75V,
CONNECT
V
IN
, SV
IN
AND INTV
CC
TOGETHER)
4.5V to 16V
22µF
×5
R
SENSE
IN
+
IN
–
V
IN1
V
IN0
SV
IN
RUN1
RUN0
FAULT0
FAULT1
SYNC
SHARE_
CLK
WP
SGND GND
LTM4678
Dual 25A µModule Regulator with Digital
Interface for Control and Monitoring*
V
OSNS0+
V
OSNS0–
V
OSNS1+
LOAD1
V
OSNS1–
SCL
SDA
ALERT
4678 TA01a
Using PMBus and LTpowerPlay to Monitor Telemetry and Margin
V
OUT0
/V
OUT1
During Load Pattern Tests, 10Hz Polling Rate, 12V
IN
V
OUT0
ADJUSTABLE
UP TO 25A
V
OUT0
Output Voltage Readback, V
OUT
Margined 7.5% Low
1.1
1.9
V
OUT0
(V)
V
OUT1
(V)
1.0
0.9
0.8
0
3
6
TIME (SEC)
9
1.8
1.7
1.6
12
4678 TA01b
2.6
I
IN0
(A)
1.0
0.5
0
0
Input Current Readback
4.3
1.6
0.8
I
IN1
(A)
LOAD0
100µF
×8
V
OUT1
ADJUSTABLE
UP TO 25A
100µF
×8
V
OUT1
3
ON/OFF CONTROL
FAULT INTERRUPTS
SYNCHRONIZATION TIME-BASE
REGISTER WRITE PROTECTION
6
TIME (SEC)
9
0
12
4678 TA01d
CHANNEL 0 TEMP (°C)
I
2
C/SMBus I/F WITH PMBus
COMMAND SET TO/FROM
IPMI OR OTHER BOARD
MANAGEMENT CONTROLLER
Output Current Readback, Varying Load Pattern
25
25
I
OUT0
(A)
10
5
0
0
3
6
TIME (SEC)
9
10
5
0
12
4678 TA01c
60
57
54
51
0
Power Stage Temperature Readback
CHANNEL 1 TEMP (°C)
60
57
54
I
OUT1
(A)
*FOR COMPLETE CIRCUIT, SEE FIGURE 46
3
6
TIME (SEC)
9
51
12
4678 TA01e
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1
Rev 0
LTM4678
TABLE OF CONTENTS
Features ..................................................... 1
Applications ................................................ 1
Typical Application ........................................ 1
Description.................................................. 1
Table of Contents .......................................... 2
Absolute Maximum Ratings .............................. 4
Order Information .......................................... 4
Pin Configuration .......................................... 4
Electrical Characteristics ................................. 5
Typical Performance Characteristics .................. 12
Pin Functions .............................................. 15
Simplified Block Diagram ............................... 19
Decoupling Requirements ............................... 19
Functional Diagram ...................................... 20
Test Circuits ............................................... 21
Operation................................................... 23
Power Module Introduction .....................................23
Power Module Overview, Major Features ..................23
EEPROM with ECC ................................................... 24
Power-Up and Initialization ......................................25
Soft-Start .................................................................26
Time-Based Sequencing ..........................................26
Voltage-Based Sequencing ......................................26
Shutdown ................................................................ 27
Light-Load Current Operation .................................. 27
Switching Frequency and Phase ............................... 28
PWM Loop Compensation ....................................... 28
Output Voltage Sensing ........................................... 28
INTV
CC
/EXTV
CC
Power ............................................ 28
Output Current Sensing and Sub Milliohm DCR
Current Sensing .....................................................29
Input Current Sensing ..............................................29
PolyPhase Load Sharing ..........................................29
External/Internal Temperature Sense .......................30
RCONFIG (Resistor Configuration) Pins ...................30
Table 1. VOUTn _CFG Pin Strapping Look-Up Table
for the LTM4678’s Output Voltage, Coarse Setting
(Not Applicable if MFR_CONFIG_ALL[6] = 1b) .....30
Table 2. VTRIMn_CFG Pin Strapping Look-Up
Table for the LTM4678’s Output Voltage, Fine
Adjustment Setting (Not Applicable if MFR_
CONFIG_ALL[6] = 1b) .......................................... 31
Table 3. FSWPH_CFG Pin Strapping Look-Up
Table to Set the LTM4678’s Switching Frequency
and Channel Phase-Interleaving Angle (Not
Applicable if MFR_CONFIG_ALL[6] = 1b) ............ 32
Table 4. ASEL Pin Strapping Look-Up Table to
Set the LTM4678’s Slave Address (Applicable
Regardless of MFR_CONFIG_ALL[6] Setting) ....33
Table 5. LTM4678 MFR_ADDRESS Command
Examples Expressed in 7- and 8-Bit Addressing ...... 33
Fault Detection and Handling ...................................33
Status Registers and
ALERT
Masking ....................34
Figure 5. LTM4678 Status Register Summary ........35
Mapping Faults to
FAULT
Pins ...............................36
Power Good Pins ...................................................36
CRC Protection ......................................................36
Serial Interface .........................................................36
Communication Protection ....................................36
Device Addressing ...................................................36
Responses to V
OUT
and I
IN
/I
OUT
Faults .................... 37
Output Overvoltage Fault Response ....................... 37
Output Undervoltage Response .............................38
Peak Output Overcurrent Fault Response ..............38
Responses to Timing Faults .....................................38
Responses to V
IN
OV Faults .....................................38
Responses to OT/UT Faults ......................................38
Internal Overtemperature Fault Response ..............38
External Overtemperature and
Undertemperature Fault Response ......................39
Responses to Input Overcurrent and Output
Undercurrent Faults ...............................................39
Responses to External Faults ...................................39
Fault Logging ........................................................... 39
Bus Timeout Protection ...........................................39
Similarity Between PMBus, SMBus and I
2
C
2-Wire Interface .....................................................40
PMBus Serial Digital Interface .................................40
Table 6. Abbreviations of Supported Data Formats ......41
Figure 6. PMBus Timing Diagram ........................... 41
Figures 7 to 24 PMBus Protocols ............................. 42
2
Rev 0
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LTM4678
TABLE OF CONTENTS
PMBus Command Summary ............................ 45
PMBus Commands ..................................................45
Table 7. PMBus Commands Summary (Note:
The Data Format Abbreviations are Detailed in
Table 8) ................................................................45
Table 8. Data Format Abbreviations .......................50
Applications Information ................................ 51
V
IN
to V
OUT
Step-Down Ratios ................................. 51
Input Capacitors ...................................................... 51
Output Capacitors .................................................... 51
Light Load Current Operation ................................... 51
Switching Frequency and Phase .............................. 52
Output Current Limit Programming .........................53
Minimum On-Time Considerations ...........................54
Variable Delay Time, Soft-Start and Output
Voltage Ramping ...................................................54
Digital Servo Mode ..................................................54
Soft Off (Sequenced Off) .........................................55
Undervoltage Lockout ..............................................56
Fault Detection and Handling ...................................56
Open-Drain Pins .......................................................56
Phase-Locked Loop and Frequency Synchronization .. 57
Input Current Sense Amplifier ..................................58
Programmable Loop Compensation ........................58
Checking Transient Response .................................. 59
PolyPhase Configuration .......................................60
Connecting The USB to I
2
C/SMBus/PMBus
Controller to the LTM4678 In System ....................60
LTpowerPlay: An Interactive GUI for Digital Power ... 61
PMBus Communication and Command Processing ...61
Thermal Considerations and Output Current
Derating ..................................................................63
Tables 10 thru 11: Output Current Derating ...............66
Table 12. Channel Output Voltage vs Component
Selection, 0A to 12.5A/μs Load Step ........................
Output Capacitor-GRM32ER60G337ME05L,
330μF, 4V, X5R, Murata ........................................ 67
Table 13. Channel Output Voltage vs Component
Selection, 0A to 12.5A/μs Load Step ....................68
Dual Phase Single Output Voltage vs Component
Selection, 25A to 50A/μs Load Step .....................68
Applications Information-Derating Curves ............ 69
EMI Performance ..................................................... 70
Safety Considerations .............................................. 70
Layout Checklist/Example ........................................ 70
Typical Applications ...................................... 72
PMBus Command Details ............................... 77
Addressing and Write Protect ...................................77
General Configuration Commands ............................ 79
On/Off/Margin...........................................................80
PWM Configuration ..................................................82
Voltage......................................................................85
Input Voltage and Limits .........................................85
Output Voltage and Limits ......................................86
Output Current and Limits ........................................89
Input Current and Limits ........................................ 91
Temperature ..............................................................92
Power Stage DCR Temperature Calibration.............92
Timing.......................................................................93
Timing—On Sequence/Ramp .................................93
Timing—Off Sequence/Ramp ................................94
Precondition for Restart .........................................95
Fault Response .........................................................95
Fault Responses All Faults ......................................95
Fault Responses Input Voltage................................96
Fault Responses Output Voltage .............................96
Fault Responses Output Current .............................99
Fault Responses IC Temperature .......................... 100
Fault Responses External Temperature ................. 101
Fault Sharing........................................................... 102
Fault Sharing Propagation .................................... 102
Fault Sharing Response ........................................ 104
Scratchpad.............................................................. 104
Identification ........................................................... 105
Fault Warning and Status ........................................ 106
MFR_INFO Data Contents: .................................... 112
Telemetry ................................................................ 112
NVM Memory Commands ...................................... 116
Store/Restore ....................................................... 116
Fault Logging ........................................................ 117
Block Memory Write/Read .................................... 121
Package Description ................................... 122
Table 22. LTM4678 BGA Pinout ............................ 122
Package Photograph ................................... 124
Design Resources ...................................... 124
Related Parts ............................................ 124
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3
Rev 0
LTM4678
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW
A
SW1
B
V
OUT1
C
D
E
V
IN1
F
GND
G
V
IN0
H
I
IN+
J
I
IN–
K
GND
L
SW0
M
1
2
3
4
5
6
7
8
9
10
V
OUT0
V
OSNS0+
V
OSNS0–
V
OUT0
GND
SYNC
PGOOD0 TSNS0b COMP0a TSNS1a TSNS0a
SCL
COMP0b SDA
SV
IN
GND
GND
COMP1b
WP
V
TRIM0_
CFG
Terminal Voltages:
V
INn
(Note 4), SV
IN
, I
IN+
, I
IN−
...................... –0.3V to 18V
(SV
IN
– I
IN+
), (I
IN+
– I
IN−
) ........................... –0.3V to 0.3V
SW0, SW1 .................. −1V to 18V, −5V to 18V Transient
V
OUTn
, INTV
CC
, EXTV
CC
............................... –0.3V to 6V
V
OSNS0+
, V
OSNS1+
......................................... –0.3V to 6V
V
OSNS0−
, V
OSNS1−
...................................... –0.3V to 0.3V
RUNn, SDA, SCL,
ALERT
........................... –0.3V to 5.5V
FSWPH_CFG, VOUT0,1_CFG,
VTRIM0,1_CFG, ASEL ......................... –0.3V to 2.75V
FAULTn,
SYNC, SHARE_CLK, WP,
PGOOD0, PGOOD1 ............................... −0.3V to 3.6V
COMPna, COMPnb, .................................. –0.3V to 2.7V
TSNS0a, TSNS1a ...................................... –0.3V to 2.2V
TSNS1b, TSNS1b ...................................... –0.3V to 0.8V
Temperatures
Internal Operating Temperature Range
(Notes 2, 13, 17, 18) ............................... –40°C to 125°C
Storage Temperature Range .................. –55°C to 125°C
Peak Solder Reflow Package Body Temperature ... 245°C
V
OSNS1+
V
OSNS1–
GND
V
OUT1
SHARE_
V
DD25
TSNS1b PGOOD1 COMP1a CLK
INTV
CC
V
DD33
EXTV
CC
SGND
F
SWPH_
V
TRIM1_
V
OUT0_
V
OUT1_
CFG
CFG
CFG
CFG
RUN1
ASEL
FAULT1
RUN0
ALERT FAULT0
11
12
BGA PACKAGE
144-LEAD (16mm × 16mm × 5.86mm)
T
JMAX
= 125°C,
θ
JCtop
= 2.5°C/W,
θ
JCbottom
= 2°C/W,
θ
BA
= 7°C/W,
θ
JA
= 9°C/W
θ
VALUES DETERMINED PER JESD51-12
WEIGHT = 3.2 GRAMS
ORDER INFORMATION
PART MARKING*
PART NUMBER
LTM4678EY#PBF
LTM4678IY#PBF
LTM4678IY
PAD OR BALL FINISH
SAC305 (RoHS)
SnPb (63/37)
DEVICE
LTM4678Y
LTM4678Y
LTM4678Y
FINISH CODE
e1
e0
PACKAGE
TYPE
BGA
MSL
RATING
4
TEMPERATURE RANGE
(See Note 2)
–40°C to 125°C
Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container.
Pad or ball finish code is per IPC/JEDEC J-STD-609.
4
Rev 0
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LTM4678
ELECTRICAL CHARACTERISTICS
SYMBOL
V
INn,
SV
IN
V
OUTn
PARAMETER
Input DC Voltage
The
l
denotes the specifications which apply over the specified internal
operating temperature range (Note 2). Specified as each individual output channel (Note 4). T
A
= 25°C, V
IN
= 12V, RUNn = 3.3V,
EXTV
CC
= 0, FREQUENCY_SWITCH = 350kHz and V
OUTn
commanded to 1.000V unless otherwise noted. Configured with factory-default
EEPROM settings and per Test Circuit 1, unless otherwise noted.
CONDITIONS
Test Circuit 1
Test Circuit 2; VIN_OFF < VIN_ON = 4V
l
l
MIN
5.75
4.5
0.5
0.5
TYP
MAX
16
5.75
3.3
3.3
UNITS
V
V
V
V
l
Range of Output Voltage Regulation V
OUT0
Differentially Sensed on V
OSNS0+
/V
OSNS0–
Pin-Pair;
+
/V
–
Pin-Pair;
l
V
OUT1
Differentially Sensed on V
OSNS1 OSNS1
Commanded by Serial Bus or with Resistors Present at Start-
Up on V
OUTn_CFG
V
OUTn(DC)
Output Voltage, Total Variation with (Note 5)
Line and Load
Digital Servo Engaged (MFR_PWM_MODEn[6] = 1b)
Digital Servo Disengaged (MFR_PWM_MODEn[6] = 0b)
V
OUTn
Commanded to 1.000V, V
OUTn
Low Range
(MFR_PWM_MODEn[1] = 1b)
Undervoltage Lockout Threshold,
When V
IN
< 4.3V
Input Inrush Current at
Start-Up
Input Supply Bias Current
V
INTVCC
Falling
V
INTVCC
Rising
Test Circuit 1, V
OUTn
=1V, V
IN
= 12V; No Load Besides
Capacitors; TON_RISE
n
= 3ms
Forced Continuous Mode, MFR_PWM_MODEn[0] = 1b
RUNn = 3.3V
Shutdown, RUN0 = RUN1 = 0V
Pulse-Skipping Mode, MFR_PWM_MODEn[0] = 0b,
I
OUTn
= 100mA
Forced Continuous Mode, MFR_PWM_MODEn[0] = 1b
I
OUTn
= 100mA
I
OUTn
= 25A
(Note 6) Utilizing MFR_PWM_MODE[7] = 1 and
Using ~I
OUT
= 34A for IOUT_OC_FAULT_LIMIT, Page 90
Digital Servo Engaged (MFR_PWM_MODEn[6] = 1b)
Digital Servo Disengaged (MFR_PWM_MODEn[6] = 0b)
SV
IN
and V
INn
Electrically Shorted Together and INTV
CC
Open Circuit; I
OUTn
= 0A, 5.0V ≤ V
IN
≤ 16V, V
OUT
Low Range
(MFR_PWM_MODEn[1] = 1b), FREQUENCY_SWITCH =
350kHz (Note 5)
Digital Servo Engaged (MFR_PWM_MODEn[6] = 1b)
Digital Servo Disengaged (MFR_PWM_MODEn[6] = 0b)
0A ≤ I
OUTn
≤ 25A, V
OUT
Low Range, (MFR_PWM_MODEn[1]
= 1b) (Note 5)
FREQUENCY_SWITCH Set to 350kHz (0xFABC)
TON_RISEn = 3ms (Note 12)
Time from V
IN
Toggling from 0V to 12V to Rising Edge
PGOODn. TON_DELAYn = 0ms, TON_RISEn = 3ms
Time from First Rising Edge of RUNn to Rising Edge of
PGOODn . TON_DELAYn = 0ms, TON_RISEn = 3ms,
V
IN
Having Been Established for at Least 70ms
Load: 0A to 12.5A and 12.5A to 0A at 12.5A/µs,
V
OUTn
= 1V, V
IN
= 12V (Note 12)
See Load Transient Graphs
l
0.995 1.000
l
0.985 1.000
1.005
1.015
V
V
V
UVLO
3.55
3.90
400
V
V
mA
Input Specifications
I
INRUSH(VIN)
I
Q(SVIN)
I
S(VINn,PSM)
I
S(VINn,FCM)
25
23
20
mA
mA
mA
Input Supply Current in Pulse-
Skipping Mode Operation
Input Supply Current in Forced-
Continuous Mode Operation
50
2.4
0
0.03
0.03
25
mA
A
A
%/V
%/V
Output Specifications
I
OUTn
∆V
OUTn(LINE)
V
OUTn
Output Continuous Current Range
Line Regulation Accuracy
l
±0.2
∆V
OUTn(LOAD)
V
OUTn
V
OUTn(AC)
f
S
(Each
Channel)
∆V
OUTn(START)
t
START
t
DELAY(0ms)
∆V
OUTn(LS)
Load Regulation Accuracy
l
0.03
0.2
0.5
%
%
Output Voltage Ripple
V
OUTn
Ripple Frequency
Turn-On Overshoot
Turn-On Start-Up Time
Turn-On Delay Time
l
10
325
350
8
l
l
mV
P-P
375
kHz
mV
ms
3.7
ms
30
2.95
3.3
Peak Output Voltage Deviation for
Dynamic Load Step
50
mV
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Rev 0