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74ALVC16244 Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
October 2001
Revised May 2005
74ALVC16244
Low Voltage 16-Bit Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16244 contains sixteen non-inverting buffers with
3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74ALVC16244 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74ALVC16244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.65V–3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
3.0 ns max for 3.0V to 3.6V V
CC
3.5 ns max for 2.3V to 2.7V V
CC
6.0 ns max for 1.65V to 1.95V V
CC
s
Power-off high impedance inputs and outputs
s
Supports live insertion and withdrawal (Note 1)
s
Uses patented noise/EMI reduction circuitry
s
Latch-up conforms to JEDEC JED98
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
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