电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

74VCXF162835MTD

产品描述IC UNIV BUS DVR 18BIT 56TSSOP
产品类别半导体    逻辑   
文件大小74KB,共8页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
标准
下载文档 详细参数 选型对比 全文预览

74VCXF162835MTD在线购买

供应商 器件名称 价格 最低购买 库存  
74VCXF162835MTD - - 点击查看 点击购买

74VCXF162835MTD概述

IC UNIV BUS DVR 18BIT 56TSSOP

74VCXF162835MTD规格参数

参数名称属性值
逻辑类型通用总线驱动器
电路数18 位
电流 - 输出高,低12mA,12mA
电压 - 电源1.65 V ~ 3.6 V
工作温度-40°C ~ 85°C
安装类型表面贴装
封装/外壳56-TFSOP(0.240",6.10mm 宽)
供应商器件封装56-TSSOP

文档预览

下载PDF文档
74VCXF162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in
Outputs
October 1999
Revised November 2000
74VCXF162835
Low Voltage 18-Bit Universal Bus Driver with 3.6V
Tolerant Outputs and 26
Series Resistors in Outputs
General Description
The VCXF162835 low voltage 18-bit universal bus driver
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched and clocked modes.
Data flow is controlled by output-enable (OE), latch-enable
(LE), and clock (CLK) inputs. The device operates in
Transparent Mode when LE is held HIGH. The device
operates in clocked mode when LE is LOW and CLK is tog-
gled. Data transfers from the Inputs (I
n
) to Outputs (O
n
) on
a Positive Edge Transition of the Clock. When OE is LOW,
the output data is enabled. When OE is HIGH the output
port is in a high impedance state.
The VCXF162835 is designed with 26
series resistors in
the outputs. This design reduces noise in applications such
as memory address drivers, clock drivers, and bus trans-
ceivers/transmitters.
The 74VCXF162835 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCXF162835 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
Compatible with PC133 DIMM module specifications
s
1.65V–3.6V V
CC
specifications provided
s
3.6V tolerant outputs
s
26
series resistors in outputs
s
t
PD
(CLK to O
n
)
3.2 ns max for 3.0V to 3.6V V
CC
4.1 ns max for 2.3V to 2.7V V
CC
7.4 ns max for 1.65V to 1.95V V
CC
s
Power-down high impedance outputs
s
Static Drive (I
OH
/I
OL
)
±
12 mA @ 3.0V V
CC
±
8 mA @ 2.3V V
CC
±
3 mA @ 1.65V V
CC
s
Latchup performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74VCXF162835MTD
74VCXF162835MTX
(Note 1)
Package
Number
MTD56
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1:
Use this Order Number to receive devices in Tape and Reel.
© 2000 Fairchild Semiconductor Corporation
DS500259
www.fairchildsemi.com

74VCXF162835MTD相似产品对比

74VCXF162835MTD 74VCXF162835MTX
描述 IC UNIV BUS DVR 18BIT 56TSSOP IC UNIV BUS DVR 18BIT 56TSSOP
逻辑类型 通用总线驱动器 通用总线驱动器
电路数 18 位 18 位
电流 - 输出高,低 12mA,12mA 12mA,12mA
电压 - 电源 1.65 V ~ 3.6 V 1.65 V ~ 3.6 V
工作温度 -40°C ~ 85°C -40°C ~ 85°C
安装类型 表面贴装 表面贴装
封装/外壳 56-TFSOP(0.240",6.10mm 宽) 56-TFSOP(0.240",6.10mm 宽)
供应商器件封装 56-TSSOP 56-TSSOP

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1515  2859  1525  1814  1953  9  19  50  33  6 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved