MX68GL1G0F
MX68GL1G0F
DATASHEET
P/N:PM1727
REV. 1.3, OCT. 30, 2013
1
MX68GL1G0F
Contents
1. FEATURES ........................................................................................................................................................ 5
2. PIN CONFIGURATION ...................................................................................................................................... 6
3. PIN DESCRIPTION ............................................................................................................................................ 7
4. BLOCK DIAGRAM............................................................................................................................................. 8
5. BLOCK DIAGRAM DESCRIPTION ................................................................................................................... 9
6. BLOCK STRUCTURE...................................................................................................................................... 10
Table 1. SECTOR ARCHITECTURE .................................................................................................. 10
7. BUS OPERATION .............................................................................................................................................11
Table 2. BUS OPERATION-1 .............................................................................................................. 11
Table 3. BUS OPERATION-2 .............................................................................................................. 12
8. FUNCTIONAL OPERATION DESCRIPTION .................................................................................................. 13
8-1. READ OPERATION ............................................................................................................................ 13
8-2. PAGE READ ....................................................................................................................................... 13
8-3. WRITE OPERATION .......................................................................................................................... 13
8-4. WRITE BUFFER PROGRAMMING OPERATION .............................................................................. 13
8-5. DEVICE RESET.................................................................................................................................. 14
8-6. STANDBY MODE ............................................................................................................................... 14
8-7. OUTPUT DISABLE ............................................................................................................................. 14
8-8. BYTE/WORD SELECTION ................................................................................................................. 15
8-9. HARDWARE WRITE PROTECT ........................................................................................................ 15
8-10. ACCELERATED PROGRAMMING OPERATION .............................................................................. 15
8-11. SECTOR PROTECT OPERATION ..................................................................................................... 15
8-12. AUTOMATIC SELECT BUS OPERATIONS ....................................................................................... 15
8-13. SECTOR LOCK STATUS VERIFICATION.......................................................................................... 15
8-14. READ SILICON ID MANUFACTURER CODE.................................................................................... 16
8-15. READ INDICATOR BIT (Q7) FOR SECURITY SECTOR ................................................................... 16
8-16. INHERENT DATA PROTECTION ....................................................................................................... 16
8-17. COMMAND COMPLETION ................................................................................................................ 16
8-18. LOW VCC WRITE INHIBIT ................................................................................................................. 16
8-19. WRITE PULSE "GLITCH" PROTECTION .......................................................................................... 16
8-20. LOGICAL INHIBIT............................................................................................................................... 16
8-21. POWER-UP SEQUENCE ................................................................................................................... 17
8-22. POWER-UP WRITE INHIBIT .............................................................................................................. 17
8-23. POWER SUPPLY DECOUPLING....................................................................................................... 17
9. COMMAND OPERATIONS .............................................................................................................................. 18
9-1. READING THE MEMORY ARRAY ..................................................................................................... 18
9-2. AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY ............................................................. 18
9-3. ERASING THE MEMORY ARRAY...................................................................................................... 19
9-4. SECTOR ERASE ................................................................................................................................ 19
9-5. CHIP ERASE ..................................................................................................................................... 20
9-6. ERASE SUSPEND/RESUME ............................................................................................................. 21
9-7. SECTOR ERASE RESUME ............................................................................................................... 21
9-8. PROGRAM SUSPEND/RESUME....................................................................................................... 22
P/N:PM1727
REV. 1.3, OCT. 30, 2013
2
MX68GL1G0F
PROGRAM RESUME ......................................................................................................................... 22
BUFFER WRITE ABORT .................................................................................................................... 22
AUTOMATIC SELECT OPERATIONS ................................................................................................ 23
AUTOMATIC SELECT COMMAND SEQUENCE ............................................................................... 23
READ MANUFACTURER ID OR DEVICE ID ..................................................................................... 23
RESET ............................................................................................................................................... 24
Advanced Sector Protection/Un-protection ......................................................................................... 25
Figure 1. Advance Sector Protection/Unprotection SPB Program Algorithm ...................................... 25
9-15-1. Lock Register .......................................................................................................................... 26
Figure 2. Lock Register Program Algorithm ........................................................................................ 26
9-15-2. Solid Protection Mode ............................................................................................................ 27
9-15-3. Temporary Un-protect Solid write Protect Bits (USPB) ........................................................... 28
Figure 3. SPB Program Algorithm ....................................................................................................... 28
9-15-4. Solid Protection Bit Lock Bit ................................................................................................... 29
9-15-5. Password Protection Method .................................................................................................. 29
Table 4. Sector Protection Status ........................................................................................................ 30
9-16. SECURITY SECTOR FLASH MEMORY REGION ............................................................................. 31
9-17. FACTORY LOCKED: SECURITY SECTOR PROGRAMMED AND PROTECTED AT THE FACTORY .
............................................................................................................................................................ 31
9-18. CUSTOMER LOCKABLE: SECURITY SECTOR NOT PROGRAMMED OR PROTECTED AT THE ...
FACTORY ........................................................................................................................................... 31
Table 5. COMMAND DEFINITIONS .................................................................................................... 32
10. COMMON FLASH MEMORY INTERFACE (CFI) MODE .............................................................................. 35
Table 6. CFI mode: Identification Data Values
.................................................................................... 35
Table 7. CFI mode: System Interface Data Values ............................................................................. 35
Table 8. CFI mode: Device Geometry Data Values ............................................................................. 36
Table 9. CFI mode: Primary Vendor-Specific Extended Query Data Values
....................................... 37
11. ELECTRICAL CHARACTERISTICS.............................................................................................................. 38
11-1. ABSOLUTE MAXIMUM STRESS RATINGS ...................................................................................... 38
11-2. OPERATING TEMPERATURE AND VOLTAGE ................................................................................. 38
Figure 4. Maximum Negative Overshoot Waveform
........................................................................... 38
Figure 5. Maximum Positive Overshoot Waveform
............................................................................. 38
Table 10. DC CHARACTERISTICS .................................................................................................... 39
Figure 6. SWITCHING TEST CIRCUITS ............................................................................................ 40
Figure 7. SWITCHING TEST WAVEFORMS ..................................................................................... 40
Table 11. AC CHARACTERISTICS ..................................................................................................... 41
12. WRITE COMMAND OPERATION.................................................................................................................. 43
Figure 8. COMMAND WRITE OPERATION ....................................................................................... 43
13. READ/RESET OPERATION .......................................................................................................................... 44
Figure 9. READ TIMING WAVEFORMS ............................................................................................. 44
Table 12. AC CHARACTERISTICS-RESET#...................................................................................... 45
Figure 10. RESET# TIMING WAVEFORM ......................................................................................... 45
14. ERASE/PROGRAM OPERATION ................................................................................................................. 46
Figure 11. AUTOMATIC CHIP ERASE TIMING WAVEFORM............................................................. 46
Figure 12. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART .................................................. 47
P/N:PM1727
REV. 1.3, OCT. 30, 2013
9-9.
9-10.
9-11.
9-12.
9-13.
9-14.
9-15.
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MX68GL1G0F
Figure 13. AUTOMATIC SECTOR ERASE TIMING WAVEFORM ...................................................... 48
Figure 14. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART ........................................... 49
Figure 15. ERASE SUSPEND/RESUME FLOWCHART .................................................................... 50
Figure 16. AUTOMATIC PROGRAM TIMING WAVEFORMS ............................................................. 51
Figure 17. ACCELERATED PROGRAM TIMING DIAGRAM .............................................................. 51
Figure 18. CE# CONTROLLED WRITE TIMING WAVEFORM .......................................................... 52
Figure 19. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART ........................................... 53
15. SILICON ID READ OPERATION ................................................................................................................... 54
Figure 20. SILICON ID READ TIMING WAVEFORM .......................................................................... 54
16. WRITE OPERATION STATUS ....................................................................................................................... 55
Figure 21. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) .......... 55
Figure 22. STATUS POLLING FOR PROGRAM/ERASE ................................................................... 56
Figure 23. STATUS POLLING FOR WRITE BUFFER PROGRAM..................................................... 57
Figure 24. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) ............... 58
Figure 25. TOGGLE BIT ALGORITHM ............................................................................................... 59
17. PAGE READ OPERATION ............................................................................................................................ 60
Figure 26. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte
mode to word mode) ........................................................................................................................... 60
Figure 27. PAGE READ TIMING WAVEFORM ................................................................................... 61
18. DEEP POWER DOWN MODE OPERATION ................................................................................................. 62
Table 13. AC CHARACTERISTICS - Deep Power Down Mode.......................................................... 62
Figure 28. DEEP POWER DOWN MODE WAVEFORM .................................................................... 62
19. WRITE BUFFER PROGRAM OPERATION .................................................................................................. 63
Figure 29. WRITE BUFFER PROGRAM FLOWCHART ..................................................................... 63
20. RECOMMENDED OPERATING CONDITIONS ............................................................................................. 64
Figure 30. AC Timing at Device Power-Up.......................................................................................... 64
21. ERASE AND PROGRAMMING PERFORMANCE ........................................................................................ 65
22. DATA RETENTION ........................................................................................................................................ 65
23. LATCH-UP CHARACTERISTICS .................................................................................................................. 65
24. PIN CAPACITANCE ....................................................................................................................................... 65
25. ORDERING INFORMATION .......................................................................................................................... 66
26. PART NAME DESCRIPTION ......................................................................................................................... 67
27. PACKAGE INFORMATION ............................................................................................................................ 68
28. REVISION HISTORY ..................................................................................................................................... 70
P/N:PM1727
REV. 1.3, OCT. 30, 2013
4
MX68GL1G0F
SINGLE VOLTAGE 3V ONLY FLASH MEMORY
1. FEATURES
GENERAL FEATURES
• 2.7 to 3.6 volt for read, erase, and program operations
• Byte/Word mode switchable
- 134,217,728 x 8 / 67,108,864 x 16
• 64KW/128KB uniform sector architecture
- 1024 equal sectors
• 16-byte/8-word page read buffer
• 64-byte/32-word write buffer
• Extra 128-word sector for security
- Features factory locked and identifiable, and customer lockable
• Advanced sector protection function (Solid and Password Protect)
• Compatible with JEDEC standard
- Pinout and software compatible to single power supply Flash
PERFORMANCE
• High Performance
- Fast access time:
- MX68GL1G0F H/L: 110ns (VCC=2.7~3.6V)
- MX68GL1G0F U/D: 120ns (VCC=2.7~3.6V, V I/O=1.65 to VCC)
- Page access time:
- MX68GL1G0F H/L: 25ns
- MX68GL1G0F U/D: 30ns
- Fast program time: 10us/word
- Fast erase time: 0.5s/sector
• Low Power Consumption
- Low active read current: 10mA (typical) at 5MHz
- Low standby current: 60uA (typical)
• Minimum 100,000 erase/program cycle
• 20 years data retention
SOFTWARE FEATURES
• Program/Erase Suspend & Program/Erase Resume
• Status Reply
- Data# Polling & Toggle bits provide detection of program and erase operation completion
• Support Common Flash Interface (CFI)
HARDWARE FEATURES
• Ready/Busy# (RY/BY#) Output
- Provides a hardware method of detecting program and erase operation completion
• Hardware Reset (RESET#) Input
- Provides a hardware method to reset the internal state machine to read mode
• WP#/ACC input pin
- Hardware write protect pin/Provides accelerated program capability
PACKAGE
• 56-Pin TSOP
• 64-Ball LFBGA (11mm x 13mm)
•
All devices are RoHS Compliant and Halogen-free
P/N:PM1727
REV. 1.3, OCT. 30, 2013
5
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