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SII1136CTU: 产品描述300MHZ HDMI 1.4 TRANSMITTER WITH; 产品类别其他集成电路（IC）消费电路; 文件大小1MB，共55页; 制造商Lattice(莱迪斯); 官网地址http://www.latticesemi.com

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SII1136CTU概述

300MHZ HDMI 1.4 TRANSMITTER WITH

SII1136CTU规格参数

参数名称	属性值
厂商名称	Lattice(莱迪斯)
包装说明	HTFQFP,
Reach Compliance Code	compliant
商用集成电路类型	CONSUMER CIRCUIT
JESD-30 代码	S-PQFP-G100
长度	14 mm
功能数量	1
端子数量	100
最高工作温度	70 °C
最低工作温度
封装主体材料	PLASTIC/EPOXY
封装代码	HTFQFP
封装形状	SQUARE
封装形式	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
座面最大高度	1.2 mm
最大供电电压 (Vsup)	1.26 V
最小供电电压 (Vsup)	1.14 V
表面贴装	YES
温度等级	COMMERCIAL
端子形式	GULL WING
端子节距	0.5 mm
端子位置	QUAD
宽度	14 mm
Base Number Matches	1

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SiI9136-3/SiI1136 HDMI Deep Color

Transmitter

Data Sheet

SiI-DS-1084-D

June 2017

SiI9136-3/SiI1136 HDMI Deep Color Transmitter

Data Sheet

Contents

Acronyms in This Document ................................................................................................................................................. 6

1. General Description ...................................................................................................................................................... 7

1.1. Video Input ........................................................................................................................................................... 7

1.2. Audio Input ........................................................................................................................................................... 7

1.3. HDMI Output ........................................................................................................................................................ 7

1.4. Control Capability ................................................................................................................................................. 7

1.5. Packaging .............................................................................................................................................................. 7

2. Product Family .............................................................................................................................................................. 8

3. Functional Description .................................................................................................................................................. 9

3.1. Video Data Input and Conversion ......................................................................................................................... 9

3.1.1.

Input Clock Multiplier/Divider .................................................................................................................... 10

3.1.2.

Video Data Capture ..................................................................................................................................... 10

3.1.3.

Embedded Sync Decoder ............................................................................................................................ 10

3.1.4.

Data Enable Generator ............................................................................................................................... 10

3.1.5.

Combiner .................................................................................................................................................... 10

3.1.6.

4:2:2 to 4:4:4 Upsampler ............................................................................................................................ 10

3.1.7.

RGB Range Expansion ................................................................................................................................. 10

3.1.8.

Color Space Converter ................................................................................................................................ 11

3.1.9.

RGB/YCbCr Range Compression ................................................................................................................. 11

3.1.10. 4:4:4 to 4:2:2 Downsampler ....................................................................................................................... 11

3.1.11. Clipping ....................................................................................................................................................... 11

3.1.12. 18-to-8/10/12/16-Dither ............................................................................................................................ 11

3.2. Audio Data Capture............................................................................................................................................. 11

3.3. Framer ................................................................................................................................................................. 11

3.4. HDCP Encryption Engine/XOR Mask ................................................................................................................... 11

3.5. HDCP Key ROM ................................................................................................................................................... 12

3.6. TMDS Transmitter ............................................................................................................................................... 12

3.7. GPIO .................................................................................................................................................................... 12

3.8. Hot Plug Detector ............................................................................................................................................... 12

3.9. CEC Interface ....................................................................................................................................................... 12

3.10.

DDC Master I

C Interface ................................................................................................................................ 12

3.11.

Receiver Sense and Interrupt Logic ................................................................................................................ 13

3.12.

Configuration Logic and Registers .................................................................................................................. 13

3.13.

C Slave Interface ........................................................................................................................................... 13

4. Electrical Specifications .............................................................................................................................................. 14

4.1. Absolute Maximum Conditions .......................................................................................................................... 14

4.2. Normal Operating Conditions ............................................................................................................................. 14

4.2.1.

I/O Specifications ........................................................................................................................................ 15

4.2.2.

DC Power Supply Specifications .................................................................................................................. 16

4.3. AC Specifications ................................................................................................................................................. 16

4.3.1.

Video/HDMI Timing Specifications ............................................................................................................. 16

4.3.2.

Audio AC Timing Specifications ................................................................................................................... 17

4.3.3.

Video AC Timing Specifications ................................................................................................................... 18

4.3.4.

Control Signal Timing Specifications ........................................................................................................... 18

4.3.5.

CEC Timing Specifications ........................................................................................................................... 19

4.4. Timing Diagrams ................................................................................................................................................. 19

4.4.1.

Input Timing Diagrams ................................................................................................................................ 19

4.4.2.

Reset Timing Diagrams ............................................................................................................................... 20

4.4.3.

TMDS Timing Diagram ................................................................................................................................ 20

4.4.4.

Audio Timing Diagrams ............................................................................................................................... 21

4.4.5.

C Timing Diagrams .................................................................................................................................... 21

5. Pin Diagram and Descriptions ..................................................................................................................................... 22

www.latticesemi.com/legal.

All other brand or product names are

trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

SiI-DS-1084-D

SiI9136-3/SiI1136 HDMI Deep Color Transmitter

Data Sheet

5.1. Pin Diagram......................................................................................................................................................... 22

5.2. Pin Descriptions .................................................................................................................................................. 23

5.2.1.

Video Data Input ......................................................................................................................................... 23

5.2.2.

TMDS Output .............................................................................................................................................. 24

5.2.3.

Audio Input ................................................................................................................................................. 24

5.2.4.

DDC, CEC, Configuration, and Control ........................................................................................................ 25

5.2.5.

Power and Ground ...................................................................................................................................... 25

5.2.6.

Not Connected and Reserved ..................................................................................................................... 25

6. Feature Information ................................................................................................................................................... 26

6.1. RGB to YCbCr Color Space Converter.................................................................................................................. 26

6.2. YCbCr to RGB Color Space Converter.................................................................................................................. 26

6.3. I

C Register Information ..................................................................................................................................... 27

6.4. I

S Audio Input .................................................................................................................................................... 27

6.5. Direct Stream Digital Input ................................................................................................................................. 27

6.6. S/PDIF Input ........................................................................................................................................................ 27

6.7. I

S and S/PDIF Supported MCLK Frequencies ..................................................................................................... 27

6.8. Audio Downsampler Limitations......................................................................................................................... 28

6.9. High Bitrate Audio on HDMI ............................................................................................................................... 29

6.10.

Power Domains ............................................................................................................................................... 29

6.11.

Internal DDC Master ....................................................................................................................................... 30

6.12.

Deep Color Support ........................................................................................................................................ 30

6.13.

Source Termination ........................................................................................................................................ 31

6.14.

3D and 4K Video Formats ............................................................................................................................... 31

6.15.

Control Signal Connections ............................................................................................................................. 32

6.16.

Input Data Bus Mapping ................................................................................................................................. 33

6.16.1. Common Video Input Formats .................................................................................................................... 33

6.16.2. RGB and YCbCr 4:4:4 Separate Sync ........................................................................................................... 34

6.16.3. YC 4:2:2 Separate Sync Formats ................................................................................................................. 36

6.16.4. YC 4:2:2 Embedded Syncs Formats ............................................................................................................. 38

6.16.5. YC Mux 4:2:2 Separate Sync Formats ......................................................................................................... 40

6.16.6. YC Mux 4:2:2 Embedded Sync Formats ...................................................................................................... 42

6.16.7. RGB and YCbCr 4:4:4 Dual Edge Mode Formats ......................................................................................... 44

7. Design Recommendations .......................................................................................................................................... 47

7.1. Power Supply Decoupling ................................................................................................................................... 47

7.2. Power Supply Sequencing ................................................................................................................................... 47

7.3. ESD Recommendations ....................................................................................................................................... 47

7.4. High-Speed TMDS Signals ................................................................................................................................... 48

7.4.1.

Layout Guidelines ....................................................................................................................................... 48

7.4.2.

TMDS Output Recommendation ................................................................................................................ 48

7.4.3.

EMI Considerations ..................................................................................................................................... 48

8. Packaging .................................................................................................................................................................... 49

8.1. ePad Requirements............................................................................................................................................. 49

8.2. PCB Layout Guidelines ........................................................................................................................................ 49

8.3. Package Dimensions ........................................................................................................................................... 50

8.4. Marking Specification ......................................................................................................................................... 51

8.5. Ordering Information .......................................................................................................................................... 51

References .......................................................................................................................................................................... 52

Standards Documents..................................................................................................................................................... 52

Standards Groups ........................................................................................................................................................... 52

Lattice Semiconductor Documents ................................................................................................................................. 52

Technical Support ........................................................................................................................................................... 53

Revision History .................................................................................................................................................................. 54

www.latticesemi.com/legal.

All other brand or product names are

trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

SiI-DS-1084-D

SiI9136-3/SiI1136 HDMI Deep Color Transmitter

Data Sheet

Figures

Figure 1.1. Typical Application for Streaming Sticks ............................................................................................................. 7

Figure 3.1. SiI9136-3/SiI1136 Functional Block Diagram ...................................................................................................... 9

Figure 3.2. Transmitter Video Data Processing Path ............................................................................................................ 9

Figure 4.1. VCCTP Test Point for VCC Noise Tolerance ....................................................................................................... 14

Figure 4.2. IDCK Clock Duty Cycle ....................................................................................................................................... 19

Figure 4.3. Control and Data Single-Edge Setup and Hold Times—EDGE = 1 ..................................................................... 19

Figure 4.4. Control and Data Single-Edge Setup and Hold Times—EDGE = 0 ..................................................................... 19

Figure 4.5. Control and Data Dual-Edge Setup and Hold Times ......................................................................................... 19

Figure 4.6. VSYNC and HSYNC Delay Times Based on DE ................................................................................................... 20

Figure 4.7. DE HIGH and LOW Times .................................................................................................................................. 20

Figure 4.8. Conditions for Use of RESET# ............................................................................................................................ 20

Figure 4.9. RESET# Minimum Timings................................................................................................................................. 20

Figure 4.10. Differential Transition Times .......................................................................................................................... 20

Figure 4.11. I

S Input Timings ............................................................................................................................................. 21

Figure 4.12. S/PDIF Input Timings ....................................................................................................................................... 21

Figure 4.13. MCLK Timings .................................................................................................................................................. 21

Figure 4.14. DSD Input Timings ........................................................................................................................................... 21

Figure 4.15. I

C Data Valid Delay (Driving Read Cycle Data) ............................................................................................... 21

Figure 5.1. Pin Diagram ....................................................................................................................................................... 22

Figure 6.1. High Speed Data Transmission .......................................................................................................................... 29

Figure 6.2. High Bitrate Stream Before and After Reassembly and Splitting ...................................................................... 29

Figure 6.3. High Bitrate Stream After Splitting ................................................................................................................... 29

Figure 6.4. Simplified Host I

C Interface Using Master DDC Port ....................................................................................... 30

Figure 6.5. Master I

C Supported Transactions .................................................................................................................. 30

Figure 6.6. Controller Connections Schematic .................................................................................................................... 32

Figure 6.7. 8-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing ........................................................................................... 35

Figure 6.8. 10-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing ......................................................................................... 35

Figure 6.9. 12-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing ......................................................................................... 35

Figure 6.10. 8-Bit Color Depth YC 4:2:2 Timing .................................................................................................................. 37

Figure 6.11. 10-Bit Color Depth YC 4:2:2 Timing................................................................................................................. 37

Figure 6.12. 12-Bit Color Depth YC 4:2:2 Timing................................................................................................................. 37

Figure 6.13. 8-Bit Color Depth YC 4:2:2 Embedded Sync Timing ........................................................................................ 39

Figure 6.14. 10-Bit Color Depth YC 4:2:2 Embedded Sync Timing ...................................................................................... 39

Figure 6.15. 12-Bit Color Depth YC 4:2:2 Embedded Sync Timing ...................................................................................... 39

Figure 6.16. 8-Bit Color Depth YC Mux 4:2:2 Timing .......................................................................................................... 40

Figure 6.17. 10-Bit Color Depth YC Mux 4:2:2 Timing ........................................................................................................ 41

Figure 6.18. 12-Bit Color Depth YC Mux 4:2:2 Timing ........................................................................................................ 41

Figure 6.19. 8-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing ................................................................................ 42

Figure 6.20. 10-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing .............................................................................. 43

Figure 6.21. 12-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing .............................................................................. 43

Figure 6.22. 8-Bit Color Depth 4:4:4 Dual Edge Timing ...................................................................................................... 45

Figure 6.23. 10-Bit Color Depth 4:4:4 Dual Edge Timing .................................................................................................... 45

Figure 6.24. 12-Bit Color Depth 4:4:4 Dual Edge Timing .................................................................................................... 45

Figure 6.25. 16-Bit Color Depth 4:4:4 Dual Edge Timing .................................................................................................... 46

Figure 7.1. Decoupling and Bypass Schematic .................................................................................................................... 47

Figure 7.2. Decoupling and Bypass Capacitor Placement ................................................................................................... 47

Figure 8.1. 100-Pin Package Diagram ................................................................................................................................. 50

Figure 8.2. Marking Diagram .............................................................................................................................................. 51

Figure 8.3. Alternate Topside Marking ............................................................................................................................... 51

www.latticesemi.com/legal.

All other brand or product names are

trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

SiI-DS-1084-D

SiI9136-3/SiI1136 HDMI Deep Color Transmitter

Data Sheet

Tables

Table 2.1. Product Selection Guide ...................................................................................................................................... 8

Table 4.1. Absolute Maximum Conditions .......................................................................................................................... 14

Table 4.2. Normal Operating Conditions ............................................................................................................................ 14

Table 4.3. DC Digital I/O Specifications............................................................................................................................... 15

Table 4.4. TMDS I/O Specifications ..................................................................................................................................... 15

Table 4.5. DC Specifications ................................................................................................................................................ 16

Table 4.6. Video Input AC Specifications ............................................................................................................................ 16

Table 4.7. TMDS AC Output Specifications ......................................................................................................................... 16

Table 4.8. S/PDIF Input Port Timings .................................................................................................................................. 17

Table 4.9. I

S Input Port Timings ......................................................................................................................................... 17

Table 4.10. DSD Input Port Timings .................................................................................................................................... 17

Table 4.11. Video AC Timing Specifications ........................................................................................................................ 18

Table 4.12. Control Signal Timing Specifications ................................................................................................................ 18

Table 6.1. RGB to YCbCr Conversion Formulas ................................................................................................................... 26

Table 6.2. YCbCr-to-RGB Conversion Formula .................................................................................................................... 26

Table 6.3. Control of the Default I

C Addresses with the CI2CA Pin ................................................................................... 27

Table 6.4. Supported MCLK Frequencies ............................................................................................................................ 28

Table 6.5. Channel Status Bits Used for Word Length ........................................................................................................ 28

Table 6.6. Supported 3D and 4K Video Formats ................................................................................................................. 31

Table 6.7. Video Input Formats .......................................................................................................................................... 33

Table 6.8. RGB/YCbCr 4:4:4 Separate Sync Data Mapping ................................................................................................. 34

Table 6.9. YC 4:2:2 Separate Sync Data Mapping ............................................................................................................... 36

Table 6.10. YC 4:2:2 Embedded Sync Data Mapping .......................................................................................................... 38

Table 6.11. YC Mux 4:2:2 Separate Sync Data Mapping ..................................................................................................... 40

Table 6.12. YC Mux 4:2:2 Embedded Sync Data Mapping .................................................................................................. 42

Table 6.13. RGB/YCbCr 4:4:4 Separate Sync Dual-Edge Data Mapping .............................................................................. 44

www.latticesemi.com/legal.

All other brand or product names are

trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

SiI-DS-1084-D

SII1136CTU

SII1136CTU概述

SII1136CTU规格参数

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