Data Sheet
FEATURES
8-Channel, 12-Bit, Configurable ADC/DAC
with On-Chip Reference, I
2
C Interface
AD5593R
GENERAL DESCRIPTION
The
AD5593R
has eight input/output (I/O) pins, which can be
independently configured as digital-to-analog converter (DAC)
outputs, analog-to-digital converter (ADC) inputs, digital outputs,
or digital inputs. When an I/O pin is configured as an analog
output, it is driven by a 12-bit DAC. The output range of the
DAC is 0 V to V
REF
or 0 V to 2 × V
REF
. When an I/O pin is
configured as an analog input, it is connected to a 12-bit ADC
via an analog multiplexer. The input range of the ADC is 0 V to
V
REF
or 0 V to 2 × V
REF
. The I/O pins can also be configured to
be general-purpose, digital input or output (GPIO) pins. The
state of the GPIO pins can be set or read back by accessing the
GPIO write data register and GPIO read configuration registers,
respectively, via an I
2
C write or read operation.
The
AD5593R
has an integrated 2.5 V, 20 ppm/°C reference that
is turned off by default and an integrated temperature indicator
that gives an indication of the die temperature. The temperature
value is read back as part of an ADC read sequence.
The
AD5593R
is available in 16-lead TSSOP and LFCSP, as well
as a 16-ball WLCSP, and operates over a temperature range of
−40°C to +105°C.
Table 1. Related Products
Product
AD5592R
AD5592R-1
Description
AD5593R
equivalent with SPI interface
AD5593R
equivalent with SPI interface and V
LOGIC
pin
8-channel, configurable ADC/DAC/GPIO
Configurable as any combination of
8 12-bit DAC channels
8 12-bit ADC channels
8 general-purpose I/O pins
Integrated temperature sensor
16-lead TSSOP and LFCSP and 16-ball WLCSP packages
I
2
C interface
APPLICATIONS
Control and monitoring
General-purpose analog and digital I/O
FUNCTIONAL BLOCK DIAGRAM
V
LOGIC
V
DD
V
REF
AD5593R
POWER-ON
RESET
INPUT
REGISTER
SCL
SDA
A0
I
2
C
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
DAC 7
GPIO7
I/O7
DAC
REGISTER
GPIO0
DAC 0
I/O0
2.5V
REFERENCE
RESET
SEQUENCER
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
TEMPERATURE
INDICATOR
GND
MUX
T/H
Figure 1.
Rev. B
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12507-001
AD5593R* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
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DESIGN RESOURCES
•
AD5593r Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
EVALUATION KITS
•
AD5593R Evaluation Board
DOCUMENTATION
Data Sheet
•
AD5593R: 8-Channel, 12-Bit, Configurable ADC/DAC with
On-Chip Reference, I2C Interface Data Sheet
User Guides
•
UG-756: Evaluating the AD5593R: 8-Channel, 12-Bit,
Configurable ADC/DAC with On-Chip Reference
DISCUSSIONS
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TECHNICAL SUPPORT
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number.
TOOLS AND SIMULATIONS
•
AD5593R IBIS Model
REFERENCE DESIGNS
•
CN0229
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AD5593R
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 6
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ........................................... 11
Terminology .................................................................................... 16
Theory of Operation ...................................................................... 18
DAC Section ................................................................................ 18
ADC Section ............................................................................... 18
GPIO Section .............................................................................. 20
Internal Reference ...................................................................... 20
Reset Function ............................................................................ 20
Temperature Indicator ............................................................... 20
Data
Sheet
Serial Interface ................................................................................ 21
Write Operation.......................................................................... 21
Read Operation........................................................................... 21
Pointer Byte ................................................................................. 23
Control Registers ........................................................................ 23
General-Purpose Control Register .......................................... 24
Configuring the AD5593R ........................................................ 25
DAC Write Operation................................................................ 26
DAC Readback............................................................................ 26
ADC Operation .......................................................................... 27
GPIO Operation ......................................................................... 29
Power-Down/Reference Control .............................................. 30
Reset Function ............................................................................ 30
Applications Information .............................................................. 31
Microprocessor Interfacing ....................................................... 31
AD5593R to ADSP-BF537 Interface........................................ 31
Layout Guidelines....................................................................... 31
Outline Dimensions ....................................................................... 32
Ordering Guide............................................................................... 33
REVISION HISTORY
1/16—Rev. A to Rev. B
Added 16-Lead LFCSP....................................................... Universal
Added V
LOGIC
Parameter and I
LOGIC
Parameter, Table 2 ...............
5
Added Figure 4 and Table 7; Renumbered Sequentially ............. 9
Added Calculating ADC Input Current Section and Figure 33 .... 20
Changes to Temperature Indicator Section................................. 21
Changes to Figure 34 ...................................................................... 22
Changes to Figure 35 and Figure 36 ............................................. 23
Changes to Figure 37 ...................................................................... 24
Change to DAC Readback Section ............................................... 27
Changes to ADC Operation Section ............................................ 28
Changes to Outline Dimensions................................................... 33
Changes to Ordering Guide .......................................................... 34
10/14—Rev. 0 to Rev. A
Added 16-Ball WLCSP ...................................................... Universal
Changes to Gain Error Parameter, Table 1 .....................................3
Changes to Table 5.............................................................................7
Added Figure 4 and Table 7; Renumbered Sequentially ..............9
Change to ADC Section ................................................................ 17
Changes to Reset Function Section and Temperature
Indicator Section ............................................................................ 19
Changes to Reset Function Section, Table 24, and Table 25 .......... 27
Added Figure 41, Outline Dimensions ........................................ 29
Updated Outline Dimensions ....................................................... 29
Changes to Ordering Guide .......................................................... 29
8/14—Revision 0: Initial Version
Rev. B | Page 2 of 33
Data Sheet
SPECIFICATIONS
V
DD
= 2.7 V to 5.5 V, V
REF
= 2.5 V (internal), T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
ADC PERFORMANCE
Resolution
Input Range
1
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Offset Error
Gain Error
Track Time (t
TRACK
)
2
Conversion Time (t
CONV
)
2
Signal to Noise Ratio (SNR)
3
Min
Typ
12
0
0
−2
−1
V
REF
2 × V
REF
+2
+1
±5
0.3
2
69
67
61
69
67
60
−91
−89
−72
91
91
72
15
12
50
−95
8.2
1.6
12
0
0
−1
−1
−3
8
±0.2
±0.1
2
±0.25
±0.1
2
10
V
REF
2 × V
REF
+1
+1
+3
Max
Unit
Bits
V
V
LSB
LSB
mV
% FSR
ns
μs
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
ns
ns
ps
dB
MHz
MHz
Bits
V
V
LSB
LSB
mV
μV/°C
% FSR
% FSR
mV
% FSR
% FSR
nF
nF
kΩ
mA
μV
Ω
mV/V
Ω
Test Conditions/Comments
f
IN
= 10 kHz sine wave
ADC range select bit = 0
ADC range select bit = 1
AD5593R
500
Signal-to-Noise + Distortion (SINAD)
Ratio
V
DD
= 2.7 V, input range = 0 V to V
REF
V
DD
= 5.5 V, input range = 0 V to V
REF
V
DD
= 5.5 V, input range = 0 V to 2 × V
REF
V
DD
= 2.7 V, input range = 0 V to V
REF
V
DD
= 3.3 V, input range = 0 V to V
REF
V
DD
= 5.5 V, input range = 0 V to 2 × V
REF
V
DD
= 2.7 V, input range = 0 V to V
REF
V
DD
= 3.3 V, input range = 0 V to V
REF
V
DD
= 5.5 V, input range = 0 V to 2 × V
REF
V
DD
= 2.7 V, input range = 0 V to V
REF
V
DD
= 3.3 V, input range = 0 V to V
REF
V
DD
= 5.5 V, input range = 0 V to 2 × V
REF
V
DD
= 3 V
V
DD
= 5 V
f
IN
= 5 kHz
At 3 dB
At 0.1 dB
Total Harmonic Distortion (THD)
Spurious Free Dynamic Range (SFDR)
Aperture Delay
2
Aperture Jitter
2
Channel-to-Channel Isolation
Full Power Bandwidth
DAC PERFORMANCE
4
Resolution
Output Range
INL
DNL
Offset Error
Offset Error Drift
2
Gain Error
Zero Code Error
Total Unadjusted Error (TUE)
Capacitive Load Stability
Resistive Load
Short-Circuit Current
DC Crosstalk
2
DC Output Impedance
DC Power Supply Rejection Ratio (PSRR)
2
Load Impedance at Rails
5
1
DAC range select bit = 0
DAC range select bit = 1
Output range = 0 V to V
REF
Output range = 0 V to 2 × V
REF
Output range = 0 V to V
REF
Output range = 0 V to 2 × V
REF
R
LOAD
= ∞
R
LOAD
= 1 kΩ
0.65
±0.03
±0.015
25
−4
0.2
0.15
25
+4
Single channel, full-scale output change
DAC code = midscale, V
DD
= 3 V ± 10% or 5 V ± 10%
Rev. B | Page 3 of 33
AD5593R
Parameter
Load Regulation
Min
Typ
200
200
Power-Up Time
AC SPECIFICATIONS
Slew Rate
Settling Time
DAC Glitch Impulse
DAC to DAC Crosstalk
Digital Crosstalk
Analog Crosstalk
Digital Feedthrough
Multiplying Bandwidth
Output Voltage Noise Spectral Density
SNR
SFDR
SINAD
Total Harmonic Distortion
REFERENCE INPUT
V
REF
Input Voltage
DC Leakage Current
V
REF
Input Impedance
REFERENCE OUTPUT
V
REF
Output Voltage
V
REF
Temperature Coefficient
Capacitive Load Stability
Output Impedance
Output Voltage Noise
Density
Line Regulation
Load Regulation
Sourcing
Sinking
Output Current Load Capability
GPIO OUTPUT
I
SOURCE
and I
SINK
Output Voltage
High, V
OH
Low, V
OL
GPIO INPUT
Input Voltage
High, V
IH
Low, V
IL
Input Capacitance
Hysteresis
Input Current
7
1.25
6
2
1
0.1
1
0.1
240
200
81
77
74
−76
1
−1
12
24
2.495
2.5
20
5
0.15
0.7
10
240
20
10
210
120
±5
1.6
V
DD
− 0.2
0.4
2.505
V
DD
+1
Max
Unit
μV/mA
μV/mA
μs
V/μs
μs
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
kHz
nV/√Hz
dB
dB
dB
dB
V
μA
kΩ
kΩ
V
ppm/°C
μF
Ω
Ω
μV p-p
nV/√Hz
μV/V
μV/V
μV/mA
μV/mA
mA
mA
V
V
I
SOURCE
= 1 mA
I
SOURCE
= 1 mA
Data
Sheet
Test Conditions/Comments
V
DD
= 5 V ± 10%, DAC code = midscale, −10 mA ≤ I
OUT
≤
+10 mA
V
DD
= 3 V ± 10%, DAC code = midscale, −10 mA ≤ I
OUT
≤
+10 mA
Exiting power-down mode, V
DD
= 5 V
DAC code = full scale, output range = 0 V to 2 × V
REF
DAC code = midscale, output range = 0 V to 2 × V
REF
,
measured at 10 kHz
No I/Ox pins configured as DACs
DAC output range = 0 V to 2 × V
REF
DAC output range = 0 V to V
REF
R
LOAD
= 2 kΩ
V
DD
= 2.7 V
V
DD
= 5 V
0.1 Hz to 10 Hz
At ambient, f = 1 kHz, C
L
= 10 nF
At ambient, sweeping V
DD
from 2.7 V to 5.5 V
At ambient, sweeping V
DD
from 2.7 V to 3.3 V
At ambient, −5 mA ≤ load current ≤ +5 mA
At ambient, −5 mA ≤ load current ≤ +5 mA
V
DD
≥ 3 V
V
DD
× 0.7
V
DD
× 0.3
20
0.2
±1
V
V
pF
V
μA
Rev. B | Page 4 of 33
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