IRDC38063-P1V2
SupIRBuck
DESCRIPTION
TM
USER GUIDE FOR IR38063 EVALUATION BOARD
The IR38063 is a synchronous buck
converter with a PMBus interface, providing
a compact, high performance and flexible
solution in a small 5mmx7mm PQFN
package.
Key features offered by the IR38063 include
I2C/PMBus configurability of output voltage,
soft-start, input UVLO, input overvoltage
protection, output overvoltage protection,
output overcurrent protection, Power Good,
thermal protection and switching frequency.
Additionally, the IR38063 also features
enhanced line/ load regulation with feed
forward, external frequency synchronization
with smooth clocking, internal LDO, true
differential remote sensing
and pre-bias
start-up.
A temperature and bias compensated output
over-current protection function is implemented
by sensing the voltage developed across the
on-resistance of the synchronous rectifier
MOSFET for optimum cost and performance.
This user guide contains the schematic and bill
of materials for the IR38063 evaluation board.
The guide describes operation and use of the
evaluation board itself. Detailed application
information for IR38063 is available in the
IR38063 data sheet.
BOARD FEATURES
•
PVin = +12V (+ 13.2V Max),
No Vcc required.
• V
out
= +1.2V @ 0-25A
•
F
s
=600kHz
•
L= 0.215uH
• C
in
= 4x22uF (ceramic 1206) + 1x330uF (electrolytic, optional)
•
C
out
=7x47uF (ceramic 0805)
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IRDC38063-P1V2
CONNECTIONS and OPERATING INSTRUCTIONS
A well regulated +12V input supply should be connected to PVin+ and PVin-. A maximum of 25A load should
be connected to VOUT+ and VOUT-. The inputs and output connections of the board are listed in Table I.
IR38063 needs only one input supply and internal LDO generates Vcc from PVin. Another internal LDo
generates the 1.8V needed by the internal digital circuits. If operation with external Vcc is required, then R25
should be removed and external Vcc can be applied between Vcc+ and Vcc- pins. Vin pin and Vcc pins
should be shorted together for external Vcc operation by installing R24. For tracking operation R27 should
be populated with a 0 ohm resistor.
For normal, non-tracking operation, R27 should not be populated
and a 100 kOhm resistor should be connected from the Track_En pin to P1V8.
The board is configured for remote sensing. If local sense is desired, R8 should be uninstalled and R16
should be installed instead.
I2C/PMBus communication is established through the 4 pin header which allows connection to the
SCL/SDA/SALERT and GND lines from the host/dongle. For proper operation in digital communications
mode, R35 must always be populated.
External Enable signal can be applied to the board via exposed Enable pad and
R18 should be removed for
this purpose.
Table I. Connections
Connection
PVin+
PVin-
Vout+
Vout-
Vcc+
Vcc-
Enable
PGood
Signal Name
PVin (+12V)
Ground of PVin
Vout(+1.2V)
Ground for Vout
Vcc Pin
Ground for Vcc input
Enable
Power Good Signal
LAYOUT
The PCB is a 6-layer board. All of layers are 2 Oz. copper. The IR38063 and most of the passive
components are mounted on the top side of the board. Power supply decoupling capacitors and
feedback components are located close to IR38063. The feedback resistors are connected to the
output of the remote sense amplifier of the IR38063 and are located close to the IR38063. To improve
efficiency, the circuit board is designed to minimize the length of the on-board power ground current
path. Separate power ground and analog ground are used and may be connected together using a 0
ohm resistor.
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IRDC38063-P1V2
CONNECTION DIAGRAM
PVin
Vout
Top View
Enable
I2C / PMBus
Communication
PGood
Bottom View
3/21/2017
3
PGND
VIN
Vsense
ADDR
VCC-
VCC+
1
1
1
1
VCC
VIN
Vsns
ADDR
VDDQ
R20
En/FCCM
R18
R52
VCC
C80
C28
R19
7.5K
0 ohm
R23 4.99K
R22
R25 0
0 ohm
PVin+
6
5
4
3
2
1
R24 N/S
21
VIN
R51
49.9K
0 ohm
N/S
PGood
VCC
10uF
Vp
1
N/S
R21
N/S
N/S
C27
4
15
11
1
1
VDDQ
1
Vp
22
PGood
8
PVin
C35
1uF
0 ohm
C29
22uF
C30
22uF
C32
22uF
C36
0.1uF
C37
N/S
C38
N/S
C39
N/S
C34
+
C1
N/S
330uF
C31
22uF
C33
N/S
C40
N/S
PGnd
R41
0
SWs
L1
C42 C43
47uF 47uF
47uF
C44
C45
C46
C47
47uF
C48
47uF
C49
47uF
C50
N/S
C51
N/S
24
C10
SW
0.1uF
12
6
5
4
3
2
1
6
FB
Comp
U1
Track_En
P1V8
IR38063
Boot
2
7
Vcc
R8
20
Vin
En/FCCM
1
RSo
1
PVin
1
R1
1.21K
R60
C26
22nF
R58
1
1
C41
2.2uF
SCL/OC
19
1
Vcc
R29N/S
SDA/IMON
SDA/IMON
Vsns
2
Vsns
R14
Vo_R_P
R32
N/S
R11
0
C55
2200pF
N/S
BODE1
2
R6
20
C67
N/S
R37
Vsns
R59
SCL/OC
Rt/Sy nc
N/S
R16
N/S
0
1
Vo_R_N
C56
N/S
C57
N/S
C58 C59
N/S N/S
C60
N/S
RS+
10
0
C54
N/S
R10
N/S
1
R15
0
BODE2
SAlert/TMON
47uF
0.1uF
5
SAlert/TMON
17
18
215 nH PCDC1008-R215EMO
R30 N/S
R31 4.99K
SCL/OCSet
SW
C52
N/S
C53
0.1uF
6
5
4
3
2
1
1
Rt/Sync
ADDR
LGnd
NC1
NC2
RS-
14
16
13
Rt/Sy nc
ADDR
R9
R35
0
LGnd
3.83K
23
26
9
C61
N/S
C62
N/S
+
C76
N/S
+
C77
N/S
+
C65
N/S
+
C66
N/S
1
C8
R4
182
Fb
R3
R2
5.62K
R38
N/S
N/S
J1
SCL
SDA
Sy nc
R40
Sy nc
0
R36
50
R39
0
TMON
1
IMON
1
N/S
R29 and R30 are unpopulated because our USB/I2C
converter dongle has on-board pullups.
SDA/IMON
N/S
R33
SAlert/TMON
R34
1
CLK
DATA
GND
ALERT#
R60 is not present in evaluation boards older than Revision C
Single point of connection between Power
Ground and Signal ( “analog” ) Ground
IRDC38063-P1V2
Fig. 1: Schematic of the IR38063 evaluation board
1
3/21/2017
1
R26
PVin-
1.8V
3
20
100K
R28 N/S
N/S R27
Track_Enb
Vout
Vout_+
Vout+
6
5
4
3
2
1
Vout-
C11
390pF
N/S
7X47uF/805/6.3V
Vout_-
4
IRDC38063-P1V2
Schematic for Transient Load set up
Vout
VCC
R42
ExtLoadCtrl
3
1
1
S1
SW
S3 should be in position
1-2 to enable transient load
0.2
R43
0.2
R44
0.2
Vo_R_P
0
KC1
Vout
Vout
2
R45
N/S
1
2
3
4
R48
10K
C78
0.1uF
U2
VS
VS
IN
OUT2
N/A OUT1
GND GND
MIC4452/SO8
8
7
6
5
C68
10u
R46
M1
IRF6721
R47
1.5K
C69
0.1uF
C79
100p
1
I-Monitor
0.2
C70
N/S
C71
N/S
C72
N/S
C73
N/S
C74
N/S
C75
N/S
C76
N/S
C77
N/S
R49
10K
R50
20m
0
KC2
Vo_R_N
3/21/2017
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